SPRUIV4D
May 2020 – May 2024
1
Read This First
About This Manual
Related Documentation
Trademarks
2
Introduction
2.1
C7000 Digital Signal Processor CPU Architecture Overview
2.2
C7000 Split Datapath and Functional Units
3
C7000 C/C++ Compiler Options
3.1
Overview
3.2
Selecting Compiler Options for Performance
3.3
Understanding Compiler Optimization
3.3.1
Software Pipelining
3.3.2
Vectorization and Vector Predication
3.3.3
Automatic Use of Streaming Engine and Streaming Address Generator
3.3.4
Loop Collapsing and Loop Coalescing
3.3.5
Automatic Inlining
3.3.6
If Conversion
4
Basic Code Optimization
4.1
Signed Types for Iteration Counters and Limits
4.2
Floating-Point Division
4.3
Loop-Carried Dependencies and the Restrict Keyword
4.3.1
Loop-Carried Dependencies
4.3.2
The Restrict Keyword
4.3.3
Run-Time Alias Disambiguation
4.4
Function Calls and Inlining
4.5
MUST_ITERATE and PROB_ITERATE Pragmas and Attributes
4.6
If Statements and Nested If Statements
4.7
Intrinsics
4.8
Vector Types
4.9
C++ Features to Use and Avoid
4.10
Streaming Engine
4.11
Streaming Address Generator
4.12
Optimized Libraries
4.13
Memory Optimizations
5
Understanding the Assembly Comment Blocks
5.1
Software Pipelining Processing Stages
5.2
Software Pipeline Information Comment Block
5.2.1
Loop and Iteration Count Information
5.2.2
Dependency and Resource Bounds
5.2.3
Initiation Interval (ii) and Iterations
5.2.4
Constant Extensions
5.2.5
Resources Used and Register Tables
5.2.6
Stage Collapsing
5.2.7
Memory Bank Conflicts
5.2.8
Loop Duration Formula
5.3
Single Scheduled Iteration Comment Block
5.4
Identifying Pipeline Failures and Performance Issues
5.4.1
Issues that Prevent a Loop from Being Software Pipelined
5.4.2
Software Pipeline Failure Messages
5.4.3
Performance Issues
6
Revision History
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