SPRUIW3 October   2021 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   Trademarks
  2. 1Feature Differences Between F28004x and F28003x
    1. 1.1 F28004x and F28003x Feature Comparison
  3. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 100-Pin PZ Package
      1. 2.1.1 100-Pin PZ Migration for Existing PCB
      2. 2.1.2 100-Pin PZ Migration for New PCB Design
    2. 2.2 PCB Hardware Changes for the 64-Pin PM Package
      1. 2.2.1 64-Pin PM Migration for New and Existing PCB
  4. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28003x
      1. 3.1.1  TMU Type1
      2. 3.1.2  Fast Integer Division (FINTDIV)
      3. 3.1.3  Host Interface Controller (HIC)
      4. 3.1.4  Background CRC (BGCRC)
      5. 3.1.5  Standby Low Power Mode
      6. 3.1.6  X1 GPIO Functionality
      7. 3.1.7  Diagnostic Features (PBIST/HWBIST)
      8. 3.1.8  Advance Encryption Standard (AES)
      9. 3.1.9  Secure Boot/JTAG Lock
      10. 3.1.10 Modular Controller Area Network (MCAN)
      11. 3.1.11 Embedded Pattern Generator (EPG)
      12. 3.1.12 Live Firmware Update (LFU)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 XTAL Module
      2. 3.5.2 PLL
      3. 3.5.3 PIE Channel Mapping
      4. 3.5.4 Bootrom
      5. 3.5.5 CLB and Motor Control Libraries
      6. 3.5.6 ERAD
      7. 3.5.7 GPIO
      8. 3.5.8 AGPIO
      9. 3.5.9 ERROR Status
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 DCDC
      3. 3.6.3 POR/BOR
      4. 3.6.4 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  5. 4Application Code Migration From F28004x to F28003x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 Minimum Compiler Version Requirement for TMU Type 1
    4. 4.4 C2000Ware Examples
  6. 5Specific Use Cases Related to F28003x New Features
    1. 5.1 HIC
    2. 5.2 FINTDIV
    3. 5.3 TMU Type1
    4. 5.4 AES
    5. 5.5 MCAN
    6. 5.6 EPG
  7. 6EABI Support
    1. 6.1 Flash API
    2. 6.2 NoINIT Struct Fix (Linker Command)
    3. 6.3 Pre-Compiled Libraries
  8. 7References

3.6 Power Management

The F28004x and F28003x devices have a few different options for power. Both devices support dual-rail (3.3 V and 1.2 V) or single-rail (3.3 V) with the internal LDO VREG however the F28004x also has the option to use it's internal DCDC to provide the 1.2 V rail. This section describes the power management differences and similarities between the two devices.