SPRUIW4 October   2021 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1

 

  1.   Trademarks
  2. 1Feature Differences Between F28002x and F28003x
    1. 1.1 F28002x and F28003x Feature Comparison
  3. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 80-Pin PN, 64-Pin PM and 48-Pin PT Packages
    2. 2.2 80-Pin PN, 64-Pin PM and 48-Pin PT Migration Between F28002x and F28003x For New and Existing PCB
  4. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28003x
      1. 3.1.1 Advance Encryption Standard (AES)
      2. 3.1.2 Secure Boot/JTAG Lock
      3. 3.1.3 Modular Controller Area Network (MCAN)
      4. 3.1.4 Embedded Pattern Generator (EPG)
      5. 3.1.5 Live Firmware Update (LFU)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 PLL
      2. 3.5.2 PIE Channel Mapping
      3. 3.5.3 Bootrom
      4. 3.5.4 CLB and Motor Control Libraries
      5. 3.5.5 AGPIO
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 POR/BOR
      3. 3.6.3 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  5. 4Application Code Migration From F28002x to F28003x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  6. 5Specific Use Cases Related to F28003x New Features
    1. 5.1 AES
    2. 5.2 MCAN
    3. 5.3 EPG
  7. 6EABI Support
    1. 6.1 Flash API
  8. 7References

3.5.1 PLL

The PLL blocks of F28002x and F28003x devices are the same, however the maximum PLL Raw Clock for F28003x is higher to accommodate the SYSCLK frequency requirement of F28003x. Table 3-4 lists the PLL features for both devices for comparison. for more information, consult the TMS320F28003x microcontrollers technical reference manual.

Table 3-4 PLL Features
Feature F28002x F28003x
VCO Range 220 - 600 MHz 220 - 600 MHz
PLL Raw Clock Range 6 - 200MHz 6 - 240 MHz
X1 Input Range (PLL enable) 2 - 25 MHz 2 - 25 MHz
REFCLK Divider Yes[1..32] Yes[1..32]
PLL Slip Detect No (use DCC) No (use DCC)
Fractional PLLMULT No No