SPRUIW7A October 2020 – February 2022
Figure 3-6 shows that the Common processor board has a dedicated EVM configuration switch (SW3) to set the various functions of EVM peripherals. Some of the configuration is for peripherals on the CPB, while other switches are used to configure peripherals on Expansion Boards. For those settings, the device-specific Expansion Board User's Guide will define the switch function.
Switch Name | Default Condition | Signal | Operation |
---|---|---|---|
SW3.1 | OFF | OSPI/HYPER_MUX_ SEL |
MUX to select between non-volatile memories: ‘0’ (OFF) = OSPI Memory connected to MCU_OSPI0 Interface ‘1’ (ON) = HyperFlash + HyperRAM connected to MCU_OSPI0 Interface |
SW3.2 | ON | TRACE/GPMC_MUX_SEL | MUX to select Trace interface for debug: ‘0’ (OFF) = Selected signals used for other peripherals (non-debug) ‘1’ (ON) = Debug/Trace connected to MIPI-60 emulation interface |
SW3.3 | OFF | USBC_MODE_SEL1 | Set Mode for USB Type C interface (USB0): '00' (OFF/OFF) = DFP (Downstream Facing Port) |
SW3.4 | OFF | USBC_MODE_SEL0 | ‘01’ (OFF/ON) = DRP (Dual Role Port) ‘1X’ (ON, Don’t Care) = UFP (Upstream Facing Port) |
SW3.5 | OFF | PCIe_1L_MODE_SEL | Not used with J7200 SOM |
SW3.6 | OFF | PCIe_2L_MODE_SEL | PCIe 2-Lane Mode Select (supports port PCIe1) ‘0’ (OFF) = Root Complex ‘1’ (ON) = End Point |
SW3.7 | ON | CSI_VIO_SEL | Not used with J7200 SOM |
SW3.8 | ON | INFO_CAM_VIO_SEL | Switch is to be used on Expansion board. See specific expansion board User’s Guide for definition. |
SW3.9 | ON | BOARDID_EEPROM_WP | Sets EVM’s configuration EEPROM Write Protection ‘0’ (OFF) = Configuration EEPROM can be updated ‘1’ (ON) = Configuration EEPROM cannot be updated/protected |
SW3.10 | ON | USER_INPUT1 | User Define, maps to IO Expander Input ‘0’ (OFF) = User Defined ‘1’ (ON) = User Defined |