SPRUIW7A October 2020 – February 2022
The J7200 SOM has 512-Mbit OSPI memory device of part number S28HS512TGABHM010 connected to OSPI0 interface of J7200 processor. The OSPI interface supports single and double data rates with memory speed up to 166 MHz SDR and 200 MHz DDR.
J7200 SOM is xSPI compliant, specifically JEDEC eXpanded SPI (JESD251) compliant.
The SOM board also supports an option to include Hyper Flash + Hyper RAM Mfr. Part# S71KS512SC0, which is a 512Mb flash + 64Mb DRAM. 12-bit Active mux TS3DDR3812RUAR is provided to select either OSPI or HBMC interface. The selection of OSPI and hyper flash will be done by using a DIP (SW3) switch which is populated on the CP board. For more details, see Section 3.4.1.