SPRUIW9C October 2021 – March 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
The register lock protection mechanism is added to protect the critical ePWM registers from being corrupted by accidental writes in case of runaway code. The register EPWMLOCK contains the definition of Lock bits (Table 20-14 shows the lock bits and the corresponding registers). This register also has a KEY field; writes to this register succeed only if the KEY field is written with a value of 0xa5a5. Refer to the register descriptions for more details.
Bit Field | Definition | Registers Locked |
---|---|---|
HRLOCK | HRPWM Register Set Lock | HRCNFG, HRPWR, HRMSTEP, HRPCTL |
GLLOCK | Global Load Register Set Lock | GLDCTL, GLDCFG |
TZCFGLOCK | TripZone Register Set Lock | TZSEL, TZDCSEL, TZCTL, TZCTL2, TZCTLDCA, TZCTLDCB, TZEINT |
TZCLRLOCK | TripZone Clear Register Set Lock | TZCLR, TZCBCCLR, TZOSTCLR, TZFRC |
DCLOCK | Digital Compare Register Set Lock | DCTRIPSEL, DCACTL, DCBCTL, DCFCTL, DCCAPCTL, DCAHTRIPSEL, DCALTRIPSEL, DCBHTRIPSEL, DCBLTRIPSEL |