SPRUIY9B May   2021  – October 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Key Features
  5. 2EVM Revisions and Assembly Variants
  6. 3Important Usage Notes
  7. 4System Description
    1. 4.1 Key Features
    2. 4.2 Functional Block Diagram
    3. 4.3 Power-On/Off Procedures
      1. 4.3.1 Power-On Procedure
      2. 4.3.2 Power-Off Procedure
    4. 4.4 Peripheral and Major Component Description
      1. 4.4.1  Clocking
        1. 4.4.1.1 Ethernet PHY Clock
        2. 4.4.1.2 AM64x SoC Clock
      2. 4.4.2  Reset
      3. 4.4.3  Power
        1. 4.4.3.1 Power Input
        2. 4.4.3.2 USB Type-C Interface for Power Input
        3. 4.4.3.3 Power Fault Indication
        4. 4.4.3.4 Power Supply
        5. 4.4.3.5 Power Sequencing
        6. 4.4.3.6 Power Supply
      4. 4.4.4  Configuration
        1. 4.4.4.1 Boot Modes
      5. 4.4.5  JTAG
      6. 4.4.6  Test Automation
      7. 4.4.7  UART Interface
      8. 4.4.8  Memory Interfaces
        1. 4.4.8.1 LPDDR4 Interface
        2. 4.4.8.2 MMC Interface
          1. 4.4.8.2.1 Micro SD Interface
          2. 4.4.8.2.2 WiLink Interface
          3. 4.4.8.2.3 OSPI Interface
          4. 4.4.8.2.4 Board ID EEPROM Interface
      9. 4.4.9  Ethernet Interface
        1. 4.4.9.1 DP83867 PHY Default Configuration
        2. 4.4.9.2 DP83867 – Power, Clock, Reset, Interrupt and LEDs
        3. 4.4.9.3 Industrial Application LEDs
      10. 4.4.10 USB 3.0 Interface
      11. 4.4.11 PRU Connector
      12. 4.4.12 User Expansion Connector
      13. 4.4.13 MCU Connector
      14. 4.4.14 Interrupt
      15. 4.4.15 I2C Interface
      16. 4.4.16 IO Expander (GPIOs)
  8. 5Known Issues
    1. 5.1 Issue 1: LP8733x Max output Capacitance Spec Exceeded on LDO0 and LDO1
    2. 5.2 Issue 2: LP8733x Output Voltage of 0.9V Exceeds AM64x VDDR_CORE max Voltage Spec of 0.895 V
    3. 5.3 Issue 3 - SDIO Devices on MMC0 Require Careful Trace Lengths to Meet Interface Timing Requirements
    4. 5.4 Issue 4 - LPDDR4 Data Rate Limitation in Stressful Conditions
    5. 5.5 Issue 5 - Junk Character
    6. 5.6 Issue 6 - Test Power Down Signal Floating
    7. 5.7 Issue 7 - uSD Boot Not Working
  9. 6Regulatory Compliance
  10. 7Revision History

4.4.3.1 Power Input

The AM64x SK EVM receives 5 V input from a USB Type-C connector. The following sections describe the power distribution network topology that supply the SK EVM board, supporting components and reference voltages.

SK-AM64B EVM board includes a power solution based on PMIC and few discrete regulators. The initial stage of the power supply is 5 V from a Type-C USB connector with part No 2012670005 from Molex, which supports 3 A current rating and necessary protection circuits for over current and voltage surge. The 5 V input (VUSB_MAIN) from the USB Connector is used to generate 3.3V (VCC3V3SYS_EXT) with the help of switching regulator (part No. LM61460AASQRJRRQ1), which is the input supply to the PMIC section. PMIC generates necessary voltages required for the SKEVM.

An ON/OFF Toggle switch (with part number AS11AP) is provided to initiate the power on and power down sequence of the Board. This switch connects TPS6522053_EN enable signal to ground when switch is in OFF position and enables PMIC TPS6522053RHBR when the switch is in ON position, thereby initiating the Power – Up Sequence. A low on enable pin of the TPS6522053RHBR PMIC by sliding the switch to OFF position initiates the Power-down Sequence.

Additionally, TEST_POWERDOWN from the test automation header is also connected to the enable pin of TPS6522053RHBR PMIC to control on/off of the EVM via the test automation board. The test automation connector requires 3.3V supply, which is provided from power mux (part No: TPS2121RUXT). The inputs to the power mux are 3V3 from two different sources. First, 3V3 supply is generated from 5 V (XDS_USB_VBUS) using an LDO (Part No: TPS79601DRBR). This is generated as long as Micro B cable is connected to J12. Second, 3V3 input is generated from 5 V (VUSB_MAIN) using a switching Buck regulator (part No: TPS62177DQCR). This is an Always ON Regulator and is supplying the necessary power as long as the USB Type C Cable is plugged in. When Both Type C cable and Micro B cable at J12 are connected, the mux priority is set to the first input supply (VCC3V3_XDS). If USB is not connected to the J12, then the mux output is from VCC3V3_TA, which is an always ON power supply.