SPRUIY9B May   2021  – October 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Key Features
  5. 2EVM Revisions and Assembly Variants
  6. 3Important Usage Notes
  7. 4System Description
    1. 4.1 Key Features
    2. 4.2 Functional Block Diagram
    3. 4.3 Power-On/Off Procedures
      1. 4.3.1 Power-On Procedure
      2. 4.3.2 Power-Off Procedure
    4. 4.4 Peripheral and Major Component Description
      1. 4.4.1  Clocking
        1. 4.4.1.1 Ethernet PHY Clock
        2. 4.4.1.2 AM64x SoC Clock
      2. 4.4.2  Reset
      3. 4.4.3  Power
        1. 4.4.3.1 Power Input
        2. 4.4.3.2 USB Type-C Interface for Power Input
        3. 4.4.3.3 Power Fault Indication
        4. 4.4.3.4 Power Supply
        5. 4.4.3.5 Power Sequencing
        6. 4.4.3.6 Power Supply
      4. 4.4.4  Configuration
        1. 4.4.4.1 Boot Modes
      5. 4.4.5  JTAG
      6. 4.4.6  Test Automation
      7. 4.4.7  UART Interface
      8. 4.4.8  Memory Interfaces
        1. 4.4.8.1 LPDDR4 Interface
        2. 4.4.8.2 MMC Interface
          1. 4.4.8.2.1 Micro SD Interface
          2. 4.4.8.2.2 WiLink Interface
          3. 4.4.8.2.3 OSPI Interface
          4. 4.4.8.2.4 Board ID EEPROM Interface
      9. 4.4.9  Ethernet Interface
        1. 4.4.9.1 DP83867 PHY Default Configuration
        2. 4.4.9.2 DP83867 – Power, Clock, Reset, Interrupt and LEDs
        3. 4.4.9.3 Industrial Application LEDs
      10. 4.4.10 USB 3.0 Interface
      11. 4.4.11 PRU Connector
      12. 4.4.12 User Expansion Connector
      13. 4.4.13 MCU Connector
      14. 4.4.14 Interrupt
      15. 4.4.15 I2C Interface
      16. 4.4.16 IO Expander (GPIOs)
  8. 5Known Issues
    1. 5.1 Issue 1: LP8733x Max output Capacitance Spec Exceeded on LDO0 and LDO1
    2. 5.2 Issue 2: LP8733x Output Voltage of 0.9V Exceeds AM64x VDDR_CORE max Voltage Spec of 0.895 V
    3. 5.3 Issue 3 - SDIO Devices on MMC0 Require Careful Trace Lengths to Meet Interface Timing Requirements
    4. 5.4 Issue 4 - LPDDR4 Data Rate Limitation in Stressful Conditions
    5. 5.5 Issue 5 - Junk Character
    6. 5.6 Issue 6 - Test Power Down Signal Floating
    7. 5.7 Issue 7 - uSD Boot Not Working
  9. 6Regulatory Compliance
  10. 7Revision History

4.3.1 Power-On Procedure

Note:

The Processor SDK Linux image provides an interactive user demo by default. Once booted, the board acts as a Wireless access point with SSID AM64xSK-AP and Password tiwilink8. Once connected, the demo can be found by navigating to http://192.168.43.1:8081. More details can be found on the Software Quick Start Guide, located on the product page.

  1. Place the SK EVM boot switch selectors (SW2, SW3) into selected boot mode. Example boot-modes for SD card and no-boot are shown below. For additional options, see Section 4.4.4.1.
    GUID-14B72935-CE6C-46C1-8B60-DB7705646CF6-low.png Figure 4-4 Common Bootmode Switch Positions
  2. Connect your boot media (if applicable).
  3. Attach the 5 V USB Type-C cable to the SK EVM Type-C (J8) Connector.
  4. Connect the other end of the Type-C cable to the source, either AC Power Adapter, or Type C source device (such as a Laptop computer).
  5. Use ON/OFF sliding switch SW5 to Power on the board.
  6. Visually inspect the LEDs against the reference photos below. The following LEDs are illuminated: LD2 and LD16 on top side of the board.
    GUID-20230501-SS0I-XXGB-WRRT-2TRKLDMN2MWT-low.png Figure 4-5 Top LED
  7. XDS110 JTAG and UART debug console output are routed to micro-USB ports J12 and J11, respectively.
    Note: Linux console output is routed to the second enumerated ttyUSB port.