I/O pin configuration consists of
several steps:
- Plan the device pin-out:
Make a list of all required peripherals for the application. Using the
peripheral mux information in the device data sheet, choose which GPIOs to use
for the peripheral signals. Decide which of the remaining GPIOs to use as inputs
and outputs for each CPU and CLA.
Once the
peripheral muxing has been chosen, implement the mux by writing the
appropriate values to the GPyMUX1/2 and GPyGMUX1/2 registers. When changing
the GPyGMUX value for a pin, always set the corresponding GPyMUX bits to
zero first to avoid glitching in the muxes. By default, all pins are
general-purpose I/Os, not peripheral signals.
- (Optional) Enable internal
pullup resistors: To enable or disable the pullup resistors, write to
the appropriate bits in the GPIO pullup disable registers (GPyPUD). All pullups
are disabled by default. Pullups can be used to keep input pins in a known state
when there is no external signal driving them.
- Select input qualification:
If the pin is used as an input, specify the required input qualification, if
any. The input qualification sampling period is selected in the GPyCTRL
registers, while the type of qualification is selected in the GPyQSEL1 and
GPyQSEL2 registers. By default, all qualification is synchronous with a sampling
period equal to PLLSYSCLK. For an explanation of input
qualification, see Section 14.6.
- Select the direction of any
general-purpose I/O pins: For each pin configured as a GPIO, specify the
direction of the pin as either input or output using the GPyDIR registers. By
default, all GPIO pins are inputs. Before changing a pin to an output, load the
output latch with the value to be driven by writing that value to the GPySET,
GPyCLEAR, or GPyDAT registers. Once the latch is loaded, write to GPyDIR to
change the pin direction. By default, all output latches are zero.
The GPyDAT_R register can be used to read what value was written to the
GPyDAT register.
- Select low-power mode wake-up
sources: GPIOs 0-63 can be used to wake the system up from low power
modes. To select one or more GPIOs for wake-up, write to the appropriate bits in
the GPIOLPMSEL0 and GPIOLPMSEL1 registers. These registers are part of the CPU
system register space. For more information on low-power
modes and GPIO wake-up, see the Low-Power Modes section in the System Control
and Interrupts chapter.
- Select external interrupt
sources: Configuring external interrupts is a two-step process. First,
the interrupts themselves must be enabled and the polarity must be configured
using the XINTnCR registers. Second, the XINT1-5 GPIO pins must be set by
selecting the sources for Input X-BAR signals 4, 5, 6, 13, and 14, respectively.
For more information on the Input X-BAR architecture, see the Crossbar
(X-BAR) chapter.