SPRUJ12F August 2021 – January 2024 AM2431 , AM2432 , AM2434
Table 4-15 describes the detailed GPIO mapping of the SoC with the LaunchPad peripherals.
Net Name | Package Signal Name | GPIO Number | Input or Output | Default | State | Function |
---|---|---|---|---|---|---|
TEST_LED1_GREEN | GPMC0_AD7 | GPIO0_22 | Output | PD | Active High | To turn on the green test LED |
TEST_LED2_RED | UART0_RTSN | GPIO1_55 | Output | PD | Active High | To turn on the red test LED |
TEST_LED3_RED | PRG1_PRU1_GPO18 | GPIO1_39 | Output | PD | Active High | To turn the bicolor LED red |
TEST_LED4_GREEN | PRG1_PRU1_GPO19 | GPIO1_38 | Output | PD | Active High | To turn the bicolor LED green |
USER_LED1 | GPMC0_AD11 | GPIO0_26 | Output | PD | Active High | To turn on the green user LED1 |
USER_LED2 | GPMC0_AD12 | GPIO0_27 | Output | PD | Active High | to turn on the green user LED2 |
USER_INTn | UART_CTSN | GPIO1_54 | Input | PU | Active Low | User interrupt input from push button switch |
OSPI0_RESET_N | OSPI0_CSN1 | GPIO0_12 | Ouput | PU | Active Low | To reset the QSPI FLASH on OSPI0 interface |
MCAN/eQEP_MUX_ SEL |
PRG0_PRU1_GPO8 | GPIO1_28 | Output | PD | N/A | To select the functionality of MCAN0_RX pin as MCAN0_RX or eQEP_I |
FSI/BP_MUX_SEL | GPMC0_AD13 | GPIO0_28 | Output | PD | N/A | To select the functionality of GPMC0_AD8 and GPMC0_AD9 pins as FSI_RX or PWM |
MCAN0_STB | PRG0_PRU1_GPO5 | GPIO1_25 | Output | PU | Active Low | To put the CAN transceiver out of standby |
PRG_CPSW_RGMII1_ MUX_SEL |
PRG1_PRU1_GPO5 | GPIO0_70 | Output | PD | N/A | To select the RGMII1 path between PRG and CPSW |
GPIO_RGMII1_PHY_ RSTn |
PRG1_PRU1_GPO8 | GPIO0_73 | Output | PU | Active Low | To reset the RGMII1 Ethernet PHY |
GPIO_RGMII2_PHY_ RSTn |
PRG1_PRU1_GPO18 | GPIO0_20 | Output | PU | Active Low | To reset the RGMII2 Ethernet PHY |
PRG1_CPSW_RGMII_ INTn |
PRG1_PRU1_GP19 | GPIO0_84 | Input | PU | Active Low | Interrupt signal from both RGMII1 & RGMII2 Ethernet PHY's |
GPIO0_50 | PRG1_PRU0_GPO5 | GPIO0_50 | IO | NA | NA | GPIO connected to BoosterPack header |
VPP_1V8_REG_EN | PRG1_PRU0_GPO8 | GPIO0_53 | Output | PD | Active High | To enable the VPP Regulator for eFUSE Programming |