SPRUJ12F August   2021  – January 2024 AM2431 , AM2432 , AM2434

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Preface: Read This First
    1. 1.1 If You Need Assistance
    2. 1.2 Important Usage Notes
  5. 2Kit Overview
    1. 2.1 Kit Contents
    2. 2.2 Key Features
    3. 2.3 Component Identification
    4. 2.4 BoosterPacks
    5. 2.5 Compliance
    6. 2.6 Security
  6. 3Board Setup
    1. 3.1 Power Requirements
      1. 3.1.1 Power Input Using USB Type-C Connector
      2. 3.1.2 Power Status LED's
      3. 3.1.3 Power Tree
      4. 3.1.4 Power Sequence
    2. 3.2 Push Buttons
    3. 3.3 Boot Mode Selection
  7. 4Hardware Description
    1. 4.1  Functional Block Diagram
    2. 4.2  BoosterPack Headers
      1. 4.2.1 Pinmux for BoosterPack
    3. 4.3  GPIO Mapping
    4. 4.4  Reset
    5. 4.5  Clock
    6. 4.6  Memory Interface
      1. 4.6.1 QSPI Interface
      2. 4.6.2 Board ID EEPROM
    7. 4.7  Ethernet Interface
      1. 4.7.1 Ethernet PHY Strapping
      2. 4.7.2 Ethernet PHY - Power, Clock, Reset, Interrupt
      3. 4.7.3 LED indication in Ethernet RJ45 Connector
    8. 4.8  USB 2.0 Interface
    9. 4.9  I2C Interface
    10. 4.10 Industrial Application LEDs
    11. 4.11 UART Interface
    12. 4.12 eQEP Interface
    13. 4.13 CAN Interface
    14. 4.14 FSI Interface
    15. 4.15 JTAG Emulation
    16. 4.16 Test Automation Interface
    17. 4.17 SPI Interface
  8. 5References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used in This Design
  9.   A E3 Design Changes
  10.   B Revision A Design Changes
  11.   Revision History

4.2.1 Pinmux for BoosterPack

GUID-20210719-CA0I-XCK3-LRVF-QKT0HDWSFD7Q-low.png Figure 4-4 80 Pin BoosterPack Pinout

The various pinmux options in different modes for Booterpack Connector pins are given below. The default modes of the pins are shown in Figure 4-2 and in bold in the tables below.

Note: The Revision A version of the LP-AM243 includes a secondary BoosterPack signal routing to support the Servo BoosterPack. For additional details on the signal routing changes, refer to Table 7-2. BoosterPack pins in the tables below that are highlighted with orange are affected by the alterntive routing of analog switches to the BoosterPack pins.
Note: The following Pinmux tables show the alternative signal routing for when SW6 is in Servo BP Signal position (orange LED indicator will be glowing). Signals that are highlighted with pink are the signals necessary to support dual axis motor control with the Servo BoosterPack.
Table 4-2 Pinmux Legend
Default signal for BP Header Servo BP signal External switch for alternate signal options
Table 4-3 Pinmux Options for J1 Connector - Site 1
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J1.1 3V3
J1.2 ADC0_AIN0 GPIO1_80
J1.3 GPMC0_ADC0 FSI_RX2_CLK UART2_RXD EHRPWM0_
SYNCI		 TRC_CLK GPIO0_15
J1.4 GPMC0_AD1 FSI_RX2_D0 UART2_TXD EHRPWM0_
SYNC0		 TRC_CTL GPIO0_16 PRG0_PWM2_
TZ_OUT
J1.5 PRG0_PRU0_
GPO12		 PRG0_PRU0_
GPI12		 PRG0_RGMII1_TD1 PRG0_PWM0_A0 GPIO1_12 GPMC0_A14
J1.6 ADC0_AIN1 GPIO1_81
J1.7 PRG0_PRU0_
GPO16		 PRG0_PRU0_
GPI16		 PRG0_RGMII1_TXC PRG0_PWM0_A2 SPI3_CLK GPIO1_16 GPMC0_A4
J1.8 PRG0_PRU0_
GPO18		 PRG0_PRU0_
GPI18		 PRG0_IEP0_EDC_
LATCH_IN0		 PRG0_PWM0_
TZ_IN		 CPTS0_
HW1TSPUSH		 CP_GEMAC_CPTS0_
HW1TSPUSH 		EHRPWM8_A GPIO1_18 UART4_CTSn GPMC0_A5 UART2_RXD
J1.9 I2C1_SCL CPTS0_
HW1TSPUSH		 TIMER_IO0 SPI2_CS1 GPIO1_66
J1.10 I2C1_SDA CPTS0_
HW2TSPUSH 		TIMER_IO1 SPI2_CS2 GPIO1_67
Table 4-4 Pinmux Options for J2 Connector - Site 1
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J2.20 DGND
J2.19 PRG0_PRU0_GPO3 PRG0_PRU0_GPI3 PRG0_RGMII1_RD3 PRG0_PWM3_A2 GPIO1_3 UART3_CTSn
J2.18 PRG0_PRU0_
GPO17 		PRG0_PRU0_
GPI17 		PRG0_IEP0_EDC_
SYNC_OUT1 		PRG0_PWM0_B2 CPTS0_TS_SYNC CP_GEMAC_
CPTS0_TS_SYNC 		SPI3_CS0 GPIO1_17 TIMER_IO11 GPMC0_A17
J2.17 PRG0_PRU0_GPO4 PRG0_PRU0_GPI4 PRG0_RGMII1_RX_CTL PRG0_PWM2_B0 GPIO1_4 GPMC0_A1 UART3_TXD
J2.16 PORz
J2.15 PRG0_PRU0_GPO13 PRG0_PRU0_GPI13 PRG0_RGMII1_TD2 PRG0_PWM0_B0 SPI3_D0 GPIO1_13 GPMC0_A15
PRG0_PRU0_GPO18 PRG0_PRU0_GPI18 PRG0_IEP0_EDC_LATCH_IN0 PRG0_PWM0_TZ_IN CPTS0_HW1TSPUSH CP_GEMAC_CPTS0_HW1TSPUSH EHRPWM8_A GPIO1_18 UART4_CTSn GPMC0_A5 UART2_RXD
J2.14 PRG0_PRU0_GPO14 PRG0_PRU0_GPI14 PRG0_RGMII1_TD3 PRG0_PWM0_A1 SPI3_D1 GPIO1_14 GPMC0_A3
J2.13 PRG0_PRU0_GPO5 PRG0_PRU0_GPI5 PRG0_PWM3_B2 GPIO1_5 UART3_RTSn
J2.12 PRG0_PRU0_GPO15 PRG0_PRU0_GPI15 PRG0_RGMII1_TX_CTL PRG0_PWM0_B1 SPI3_CS1 GPIO1_15 GPMC0_A16
PRG0_PRU0_GPO11 PRG0_PRU0_GPI11 PRG0_RGMII1_TD0 PRG0_PWM3_
TZ_OUT		 GPIO1_11 UART4_RXD
J2.11 PRG0_PRU1_GPO0 PRG0_PRU1_GPI0 PRG0_RGMII2_RD0 GPIO1_20 EQEP0_A UART5_CTSn
Table 4-5 Pinmux Options for J3 Connector - Site 1
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J3.21 5V0
J3.22 DGND
J3.23 ADC0_AIN2 GPIO1_82
J3.24 ADC0_AIN3 GPIO1_83
J3.25 ADC_AIN4 GPIO1_84
J3.26 ADC0_AIN5 GPIO1_85
J3.27 ADC0_AIN6 GPIO1_86
J3.28 ADC0_AIN7 GPIO1_87
J3.29 MCAN0_TX UART4_RXD TIMER_IO2 SYNC2_OUT SPI4_CS1 GPIO1_60 EQEP2_I UART0_DTRn
J3.30 MCAN0_RX UART4_TXD TIMER_IO3 SYNC3_OUT SPI4_CS2 GPIO1_61 EQEP2_S UART0_RIn
Table 4-6 Pinmux Options for J4 Connector - Site 1
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J4.40 GPMC0_AD3 FSI_RX3_CLK UART3_RXD EHRPWM0_A TRC_DATA1 GPIO0_18 PRG0_PWM2_A0
J4.39 GPMC0_AD4 FSI_RX3_D0 UART3_TXD EHRPWM0_B TRC_DATA2 GPIO0_82 PRG0_PWM2_B0
J4.38 GPMC0_AD5 FSI_RX3_D1 UART3_RTSn EHRPWM1_A TRC_DATA3 GPIO0_83 PRG0_PWM2_A1
J4.37 GPMC0_AD6 FSI_RX4_D0 UART4_RXD EHRPWM1_B TRC_DATA4 GPIO0_21 PRG0_PWM2_B1
J4.36 GPMC0_AD8 FSI_RX0_CLK UART2_CTSn EHRPWM2_A TRC_DATA6 GPIO0_23 PRG0_PWM2_A2
J4.35 GPMC0_AD9 FSI_RX0_D0 UART3_CTSn EHRPWM2_B TRC_DATA7 GPIO0_24 PRG0_PWM2_B2
J4.34 GPMC0_AD2 FSI_RX2_D1 UART2_RTSn EHRPWM_TZn_IN0 TRC_DATA0 GPIO0_17 PRG0_PWM2_TZ_IN
J4.33 PRG0_PRU0_GPO0 PRG0_PRU0_GPI0 PRG0_RGMII1_RD0 PRG0_PWM3_A0 GPIO1_0 UART2_CTSn
J4.32 PRG0_PRU0_GPO1 PRG0_PRU0_GPI1 PRG0_RGMII1_RD1 PRG0_PWM3_B0 GPIO1_1 UART2_TXD
J4.31 PRG0_PRU0_GPO2 PRG0_PRU0_GPI2 PRG0_RGMII1_RD2 PRG0_PWM2_A0 GPIO1_2 GPMC0_A0 UART2_RTSn
Table 4-7 Net Name in Schematic and Package Signal Name for J1/J3 Connector
Connector Pinout ALX Ball Net Name in Schematic Package Net Name
J1.1 PWR VSYS_3V3
J1.2 H21 BP_ADC0_AIN0 ADC_AIN0
J1.3 R21 MAIN_UART2_RXD GPMC0_AD0
J1.4 R20 MAIN_UART2_TXD GPMC0_AD1
J1.5 K1 GPIO1_12 PRG0_PRU0_GPO12
J1.6 F19 BP_ADC0_AIN1 ADC0_AIN1
J1.7 N3 SPI3_CLK PRG0_PRU0_GPO16
J1.8 K4 GPIO1_18 PRG0_PRU0_GPO18
J1.9 A17 SOC_I2C1_SCL I2C1_SCL
J1.10 B18 SOC_I2C1_SDA I2C1_SDA
J3.21 PWR VSYS_5V0
J3.22 GND DGND
J3.23 F21 BP_ADC0_AIN2 ADC0_AIN2
J3.24 F20 BP_ADC0_AIN3 ADC0_AIN3
J3.25 H20 BP_ADC0_AIN4 ADC0_AIN4
J3.26 E21 BP_ADC0_AIN5 ADC0_AIN5
J3.27 G20 BP_ADC0_AIN6 ADC0_AIN6
J3.28 E20 BP_ADC0_AIN7 ADC0_AIN7
J3.29 B13 SYNC2_OUT MCAN0_TX
J3.30 A14 SYNC3_OUT MCAN0_RX
Table 4-8 Net Name in Schematic and Package Signal Name for J2/J4 Connector
Connector Pinout ALX Ball Net Name in Schematic Package Net Name
J4.40 V21 EHRPWM0_A GPMC0_AD3
J4.39 U21 EHRPWM0_B GPMC0_AD4
J4.38 T20 EHRPWM1_A GPMC0_AD5
J4.37 T18 EHRPWM1_B GPMC0_AD6
J4.36 U18 EHRPWM2_A GPMC0_AD8
J4.35 U20 EHRPWM2_B GPMC0_AD9
J4.34 T19 EHRPWM0_TZN_IN0 GPMC0_AD2
J4.33 J3 GPIO1_0 PRG0_PRU0_GPO0
J4.32 J4 GPIO1_1 PRG0_PRU0_GPO1
J4.31 G1 GPIO1_2 PRG0_PRU0_GPO2
J2.20 GND DGND
J2.19 H1 GPIO1_3 PRG0_PRU0_GPO3
J2.18 E1 SPI3_CS0 PRG0_PRU0_GPO17
J2.17 K2 GPIO1_4 PRG0_PRU0_GPO4
J2.16 C20 BP_CONN_1_PORZ
J2.15 N1 SPI3_D0 PRG0_PRU0_GPO13
J2.14 N2 SPI3_D1 PRG0_PRU0_GPO14
J2.13 F2 GPIO1_5 PRG0_PRU0_GPO5
J2.12 N4 SPI3_CS1 PRG0_PRU0_GPO15
J2.11 L5 GPIO1_20 PRG0_PRU1_GPO0
Table 4-9 Pinmux Options for J5 Connector - Site 2
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J5.41 3V3
J5.42 EXT_REFCLK1 SYNC1_OUT SPI2_CS3 CLKOUT0 GPIO1_69
J5.43 PRG0_PRU0_GPO11 PRG0_PRU0_GPI11 PRG0_RGMII1_TD0 PRG0_PWM3_
TZ_OUT		 GPIO1_11 UART4_RXD
EXT_REFCLK1 SYNC1_OUT SPI2_CS3 CLKOUT0 GPIO1_69
J5.44 PRG0_PRU0_GPO7 PRG0_PRU0_GPI7 PRG0_IEP0_EDC_LATCH_IN1 PRG0_PWM3_B1 CPTS0_
HW2TSPUSH		 CP_GEMAC_CPTS
0_HW2TSPUSH 		TIMER_IO6 GPIO1_7 UART4_TXD
J5.45 PRG0_PRU0_GPO19 PRG0_PRU0_GPI19 PRG0_IEP0_EDC_SYNC_OUT0 PRG0_PWM0_
TZ_OUT 		CPTS0_TS_COMP CP_GEMAC_
CPTS0_TS_COMP 		EHRPWM8_B GPIO1_19 UART4_RTSn GPMC0_A6 UART3_RXD
J5.46 NC
J5.47 SPI0_CLK GPIO1_44
J5.48 PRG0_PRU0_GPO6 PRG0_PRU0_GPI6 PRG0_RGMII1_RXC PRG0_PWM3_A1 GPIO1_6 UART4_CTSn
J5.49 I2C0_SCL UART6_CTSn GPIO1_64
J5.50 I2C0_SDA UART6_RTSn GPIO1_65
Table 4-10 Pinmux Options for J6 Connector - Site 2
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J6.60 GND
J6.59 PRG0_PRU1_GPO15 PRG0_PRU1_GPI15 PRG0_RGMII2_TX_CTL PRG0_PWM1_B1 GPIO1_35 GPMC0_A10 PRG0_ECAP0_IN_APWM_
OUT
J6.58 SPI0_CS1 CPTS0_TS_COMP I2C2_SCL TIMER_IO10 PRG0_IEP0_ED
IO_OUTVALID 		UART6_RXD ADC_EXT_
TRIGGER0 		GPIO1_43
J6.57 PRG0_PRU1_GPO16 PRG0_PRU1_GPI16 PRG0_RGMII2_TXC PRG0_PWM1_A2 GPIO1_36 GPMC0_A11 PRG0_ECAP0_SYNC_OUT
PRG0_PRU1_GPO8 PRG0_PRU1_GPI8 PRG0_PWM2_TZ_OUT GPIO1_28 EQEP2_S UART4_RTSn
J6.56 BP_CONN_2_PORZ
J6.55 SPI0_D0 GPIO1_45
J6.54 SPI0_D1 GPIO1_46
J6.53 PRG0_MDIO0_MDIO GPIO1_40 GPMC0_A12
J6.52 PRG0_MDIO0_MDC GPIO1_41 GPMC0_A13
J6.51 PRG0_PRU0_GPO8 PRG0_PRU0_GPI8 PRG0_PWM2_A1 GPIO1_8 GPMC0_A2 UART4_RTSn
Table 4-11 Pinmux Options for J7 Connector - Site 2
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J7.61 5V0
J7.62 GND
J7.63 PRG1_PRU0_GPO19 PRG1_PRU0_GPI19 PRG1_IEP0_EDC_SYNC_OUT0 PRG1_PWM0_TZ_OUT CPTS0_TS_COMP TIMER_IO9 GPIO0_64 GPMC0_A2
J7.64 PRG1_PRU0_GPO18 PRG1_PRU0_GPI18 PRG1_IEP0_EDC_LATCH_IN0 PRG1_PWM0_TZ_IN CPTS0_
HW1TSPUSH		 TIMER_IO8 GPIO0_63 GPMC0_A1
J7.65 PRG1_PRU0_GPO17 PRG1_PRU0_GPI17 PRG1_IEP0_EDC_SYNC_OUT1 PRG1_PWM0_B2 CPTS0_TS_SYNC TIMER_IO7 GPIO0_62 GPMC0_A0
J7.66 PRG1_PRU0_GPO7 PRG1_PRU0_GPI7 PRG1_IEP0_EDC_LATCH_IN1 PRG1_PWM3_B1 CPTS0_
HW2TSPUSH 		CLKOUT0 TIMER_IO10 GPIO0_52 GPMC0_AD23
J7.67 PRG0_PRU1_GPO1 PRG0_PRU1_GPI1 PRG0_RGMII2_RD1 GPIO1_21 EQEP0_B UART5_TXD
J7.68 PRG0_PRU1_GPO2 PRG0_PRU1_GPI2 PRG0_RGMII2_RD2 PRG0_PWM2_A2 GPIO1_22 EQEP0_S UART5_RTSn
J7.69 PRG0_PRU1_GPO6 PRG0_PRU1_GPI6 PRG0_RGMII2_RXC GPIO1_26 EQEP2_A GPMC0_A19 UART4_CTSn
J7.70 PRG0_PRU1_GPO11 PRG0_PRU1_GPI11 PRG0_RGMII2_TD0 GPIO1_31 EQEP2_I UART4_RXD
Table 4-12 Pinmux Options for J8 Connector - Site 2
Pinout Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 Mode10
J8.80 MMC1_DAT3 CP_GEMAC_CPTS0_TS_COMP TIMER_IO0 UART2_RXD GPIO1_71
GPOMC0_AD14 FSI_TX0_D0 UART6_RXD EHRPWM3_B TRC_DATA12 GPIO0_29 PRG0_PWM3_B0
J8.79 MMC1_DAT2 CP_GEMAC_CPTS0_
TS_SYNC 		TIMER_IO1 UART2_TXD GPIO1_72
GPMC0_BE1n FSI_TX0_CLK EHRPWM5_A TRC_DATA19 GPIO0_36 PRG0_PWM3_A2
J8.78 MMC1_DAT1 CP_GEMAC_CPTS0_
HW1TSPUSH 		TIMER_IO2 UART3_RXD GPIO1_73
GPMC0_AD10 FSI_RX0_D1 UART4_CTSn EHRPWM_TZn_IN2 EHRPWM8_B TRC_DATA8 GPIO0_25 PRG1_PWM2_B2
J8.77 MMC1_DAT0 CP_GEMAC_CPTS0_
HW2TSPUSH 		TIMER_IO3 UART3_TXD GPIO1_74
GPMC0_AD7 FSI_RX4_D1 UART4_TXD EHRPWM_TZn_IN1 EHRPWM8_A TRC_DATA5 GPIO0_22 PRG1_PWM2_A2
J8.76 MMC1_CLK UART2_CTSn TIMER_IO4 UART4_RXD GPIO1_75
PRG0_PRU1_GPO19 PRG0_PRU1_GPI19 PRG0_IEP1_EDC_SYNC_OUT0 PRG0_PWM1_TZ_OUT MDIO0_MDC RMII1_CRS_DV EHRPWM7_B GPIO1_39 PRG0_ECAP0_IN_APWM_OUT
J8.75 MMC1_CMD UART2_RTSn TIMER_IO5 UART4_TXD GPIO1_76
PRG0_PRU1_GPO18 PRG0_PRU1_GPI18 PRG0_IEP1_EDC_LATCH_IN0 PRG0_PWM1_TZ_IN MDIO0_MDIO RMII1_TX_EN EHRPWM7_A GPIO1_38 PRG0_ECAP0_SYNC_IN
J8.74 MMC1_SDCD UART3_CTSn TIMER_IO6 UART5_RXD GPIO1_77
J8.73 MMC1_SDWP UART3_RTSn TIMER_IO7 UART5_TXD GPIO1_78
J8.72 PRG0_PRU1_GPO12 PRG0_PRU1_GPI12 PRG0_RGMII2_TD1 PRG0_PWM1_A0 GPIO1_32 EQEP2_B GPMC0_A7 UART4_TXD
J8.71 PRG0_PRU1_GPO13 PRG0_PRU1_GPI13 PRG0_RGMII2_TD2 PRG0_PWM1_B0 GPIO1_33 EQEP0_I GPMC0_A8 UART5_RXD
Table 4-13 Net Name in Schematic and Package Signal Name for J5/J7 Connector
Connector Pinout ALX Ball Net Name in Schematic Package Signal Name
J5.41 PWR BP_3V3
J5.42 A18 SYNC1_OUT EXT_REFCLK1
J5.43 L1 MAIN_UART4_RXD PRG0_PRU0_GPO11
J5.44 E2 MAIN_UART4_TXD PRG0_PRU0_GPO7
J5.45 G2 GPIO1_19 PRG0_PRU0_GPO19
J5.46 NC NC
J5.47 B8 SPI0_CLK SPI0_CLK
J5.48 H2 GPIO1_6 PRG0_PRU0_GPO6
J5.49 B16 SOC_I2C0_SCL_BP I2C0_SCL
J5.50 B15 SOC_I2C0_SDA_BP I2C0_SDA
J7.61 PWR B5_5V0
J7.62 GND DGND
J7.63 U3 PRG1_IEP0_EDC_SYNC_OUT0 PRG1_PRU0_GPO19
J7.64 Y4 PRG1_IEP0_EDC_LATCH_IN0 PRG1_PRU0_GPO18
J7.65 T2 PRG1_IEP0_EDC_SYNC_OUT1 PRG1_PRU0_GPO17
J7.66 V13 PRG1_IEP0_EDC_LATCH_IN1 PRG1_PRU0_GPO7
J7.67 J2 GPIO1_21 PRG0_PRU1_GPO1
J7.68 M2 GPIO1_22 PRG0_PRU1_GPO2
J7.69 F5 GPIO1_26 PRG0_PRU1_GPO6
J7.70 P1 GPIO1_31 PRG0_PRU1_GPO11
Table 4-14 Net Name in Schematic and Package Signal Name for J6/J8 Connector
Connector Pinout ALX Ball Net Name in Schematic Package Signal Name
J6.60 GND DGND
J6.59 M4 GPIO1_35 PRG0_PRU1_GPO15
J6.58 B7 SPI0_CS1 SPI0_CS1
J6.57 T3 GPIO1_36 PRG0_PRU1_GPO16
J6.56 C20 BP_CONN_2_PORZ
J6.55 A8 SPI0_D0 SPI0_D0
J6.54 C9 SPI0_D1 SPI0_D1
J6.53 E4 GPIO1_40 PRG0_MDIO0_MDIO
J6.52 D2 GPIO1_41 PRG0_MDIO0_MDC
J6.51 H5 GPIO1_8 PRG0_PRU0_GPO8
J8.71 T4 GPIO1_33 PRG0_PRU1_GPO13
J8.72 P2 GPIO1_32 PRG0_PRU1_GPO12
J8.73 C16 GPIO1_78 MMC1_SDWP
J8.74 B17 GPIO1_77 MMC1_SDCD
J8.75 J21 TIMER_IO5 MMC1_CMD
J8.76 J20 TIMER_IO4 MMC1_CLK
J8.77 J18 TIMER_IO3 MMC1_DAT0
J8.78 J19 TIMER_IO2 MMC1_DAT1
J8.79 K20 TIMER_IO1 MMC1_DAT2
J8.80 K18 TIMER_IO0 MMC1_DAT3