SPRUJ21D October   2022  – February 2024

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 EMC, EMI, and ESD Compliance
  5. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J14] With LED for Status [LD3]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW1]
      2. 2.2.2 Reset Pushbutton [SW2]
      3. 2.2.3 User Pushbutton [SW3] With User LED Indication [LD2]
    3. 2.3 Standard Interfaces
      1. 2.3.1 Uart-Over-USB [J4] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J8] With Integrated LEDs for Status
      3. 2.3.3 JTAG/Emulation Interface [J9]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J10] [J12]
      5. 2.3.5 M.2 Key E Connector [J11] for Wi-Fi Networking Modules
      6. 2.3.6 Stacked DisplayPort and HDMI Type A [J13]
      7. 2.3.7 M.2 Key M Connector [J22] for SSD Modules
      8. 2.3.8 MicroSD Card Cage [J23]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC1] With [J16] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J1] [J2] [J5] [J6]
      3. 2.4.3 Expansion Header [J3]
      4. 2.4.4 Camera Interface, 15-Pin Flex Connectors [J18] [J19]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J24]
      6. 2.4.6 Automation and Control Connector [J25]
  6. 3Mechanicals
  7. 4Circuit Details
    1. 4.1 Top Level Diagram
    2. 4.2 Interface Mapping
    3. 4.3 I2C Address Mapping
    4. 4.4 GPIO Mapping
    5. 4.5 Identification EEPROM
  8. 5Usage Notes and Advisories
    1. 5.1 Usage Notes
    2. 5.2 Advisories
  9. 6References
  10. 7Revision History

4.1 Top Level Diagram

Figure 4-1 shows the functional block diagram of the EVM Board.

GUID-20210816-SS0I-VWGL-FGHT-HF1ZSVL3SQQ4-low.gif Figure 4-1 SK-TDA4VM Functional Block Diagram