SPRUJ21D October   2022  – February 2024

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 EMC, EMI, and ESD Compliance
  5. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J14] With LED for Status [LD3]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW1]
      2. 2.2.2 Reset Pushbutton [SW2]
      3. 2.2.3 User Pushbutton [SW3] With User LED Indication [LD2]
    3. 2.3 Standard Interfaces
      1. 2.3.1 Uart-Over-USB [J4] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J8] With Integrated LEDs for Status
      3. 2.3.3 JTAG/Emulation Interface [J9]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J10] [J12]
      5. 2.3.5 M.2 Key E Connector [J11] for Wi-Fi Networking Modules
      6. 2.3.6 Stacked DisplayPort and HDMI Type A [J13]
      7. 2.3.7 M.2 Key M Connector [J22] for SSD Modules
      8. 2.3.8 MicroSD Card Cage [J23]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC1] With [J16] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J1] [J2] [J5] [J6]
      3. 2.4.3 Expansion Header [J3]
      4. 2.4.4 Camera Interface, 15-Pin Flex Connectors [J18] [J19]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J24]
      6. 2.4.6 Automation and Control Connector [J25]
  6. 3Mechanicals
  7. 4Circuit Details
    1. 4.1 Top Level Diagram
    2. 4.2 Interface Mapping
    3. 4.3 I2C Address Mapping
    4. 4.4 GPIO Mapping
    5. 4.5 Identification EEPROM
  8. 5Usage Notes and Advisories
    1. 5.1 Usage Notes
    2. 5.2 Advisories
  9. 6References
  10. 7Revision History

2.4.3 Expansion Header [J3]

The EVM includes a 40-pin (2x20, 2.54mm pitch) expansion interface [J3]. The expansion connector supports variety of interfaces including: I2C, serial peripheral interface (SPI), I2S with Audio clock, UART, pulse width modulator (PWM), and GPIO. All signals on the interfaces are 3.3V levels.

Table 2-10 Expansion Header Pin Definition [J3]
Pin # Pin Name Description (TDA4VM Pin #) Dir
1 Power Power, 3.3V Output
2 Power Power, 5.0V Output
3 I2C_SDA I2C Bus #5, Data (AA27) Bi-Dir
4 Power Power, 5.0V Output
5 I2C_SCL I2C Bus #5, Clock (Y26) Bi-Dir
6 GND Ground
7 GP_CLK/GPIO REFCLK0/GPIO0 #7 (AD22) Bi-Dir
8 UART_TXD UART #2 Transmit (AA24) Output
9 GND Ground
10 UART_RXD UART #2 Receive (AA26) Input
11 GPIO GPIO0 #71 (AA28) Bi-Dir
12 I2S_SCLK McASP #6 ACLKX (AC23) Bi-Dir
13 GPIO GPIO0 #82 (AA29) Bi-Dir
14 GND Ground
15 GPIO GPIO0 #11 (AD21) Bi-Dir
16 GPIO GPIO0 #5 (AH23) Bi-Dir
17 Power Power, 3.3V Output
18 GPIO GPIO1 #12 (U3) Bi-Dir
19 SPI_MOSI SPI #5 Data 0 (V25) Bi-Dir
20 GND Ground
21 SPI_MISO SPI #5 Data 1 (W24) Bi-Dir
22 GPIO GPIO0 #8 (AE20) Bi-Dir
23 SPI_SCLK SPI #5 Clock (W29) Bi-Dir
24 SPI_CS0 SPI #5 Chip Select 0 (W27) Bi-Dir
25 GND Ground
26 SPI_CS1 SPI #5 Chip Select 1 (W25) Bi-Dir
27 ID_SDA Wkup I2C Data (H24) Bi-Dir
28 ID_SCL Wkup I2C Clock (J25) Bi-Dir
29 GPIO GPIO0 #93 (U27) Bi-Dir
30 GND Ground
31 GPIO GPIO0 #94 (U24) Bi-Dir
32 PWM0 PWM3_A (V23) Output
33 PWM1 PWM3_B (W23) Output
34 GND Ground
35 I2S_FS McASP #6 FSX (AG22) Bi-Dir
36 GPIO GPIO0_97 (Y28) Bi-Dir
37 GPIO GPIO0_115 (AA3) Bi-Dir
38 I2S_DIN McASP #6 (AF22) Bi-Dir
39 GND Ground
40 I2S_DOUT McASP #6 (AJ23) Bi-Dir
Note: In the DIR column, output is to the expansion module, input is from the expansion module. Bi-Dir signals can be configured as either input or output.
Note: All the signals on the Expansion connector can support other functions including GPIO. For full list of functions available on each pin, see the TDA4VM Jacinto™ Processors for ADAS and Autonomous Vehicles Silicon Revisions 1.0 and 1.1. Functions like UART and PWM set as INPUT or OUTPUT can be Bi-Dir when configured as GPIO.