SPRUJ21D October   2022  – February 2024

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 EMC, EMI, and ESD Compliance
  5. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J14] With LED for Status [LD3]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW1]
      2. 2.2.2 Reset Pushbutton [SW2]
      3. 2.2.3 User Pushbutton [SW3] With User LED Indication [LD2]
    3. 2.3 Standard Interfaces
      1. 2.3.1 Uart-Over-USB [J4] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J8] With Integrated LEDs for Status
      3. 2.3.3 JTAG/Emulation Interface [J9]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J10] [J12]
      5. 2.3.5 M.2 Key E Connector [J11] for Wi-Fi Networking Modules
      6. 2.3.6 Stacked DisplayPort and HDMI Type A [J13]
      7. 2.3.7 M.2 Key M Connector [J22] for SSD Modules
      8. 2.3.8 MicroSD Card Cage [J23]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC1] With [J16] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J1] [J2] [J5] [J6]
      3. 2.4.3 Expansion Header [J3]
      4. 2.4.4 Camera Interface, 15-Pin Flex Connectors [J18] [J19]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J24]
      6. 2.4.6 Automation and Control Connector [J25]
  6. 3Mechanicals
  7. 4Circuit Details
    1. 4.1 Top Level Diagram
    2. 4.2 Interface Mapping
    3. 4.3 I2C Address Mapping
    4. 4.4 GPIO Mapping
    5. 4.5 Identification EEPROM
  8. 5Usage Notes and Advisories
    1. 5.1 Usage Notes
    2. 5.2 Advisories
  9. 6References
  10. 7Revision History

2.4.4 Camera Interface, 15-Pin Flex Connectors [J18] [J19]

The EVM supports two (2) 15-pin flex (1.0mm pitch) connectors [J18][J19] for interfacing with camera modules. Each camera interface provides MIPI CSI-2 interface (2Lane), Clock/Control signals, and power (3.3V) to the camera.

To enable camera modules with same addressing to be used simultaneously, I2C mux is used to select each camera. The voltage level for Clock/Control signals is selectable between 1.8V/3.3V.

Table 2-11 Camera 1 Flex Pin Definition [J18]
Pin # Pin Name Description Dir
1 / 1A GND Ground
3 / 2A CSI0_D0_N CSI Port 0 Data Lane 0 Input
5 / 3A CSI0_D0_P CSI Port 0 Data Lane 0 Input
7 / 4A GND Ground
9 / 5A CSI0_D1_N CSI Port 0 Data Lane 1 Input
11 / 6A CSI0_D1_P CSI Port 0 Data Lane 1 Input
13 / 7A GND Ground
15 / 8A CSI0_CLK_N CSI Port 0 CLK Input
17 / 9A CSI0_CLK_P CSI Port 0 CLK Input
19 / 10A GND Ground
21 / 11A CAM1_PWDN Pwr-Dwn (GPIO0-116) Output
23 / 12A CAM1_AUX AUX (GPIO0-117) Bi-Dir
25 / 13A I2C_SCL I2C Clock #3, Mux 0 Output
27 / 14A I2C_SDA I2C Data # 3, Mux 0 Bi-Dir
29 / 15A Power Power, 3.3V Output
Table 2-12 Camera 2 Flex Pin Definition [J19]
Pin # Pin Name Description Dir
1 / 1A GND Ground
3 / 2A CSI1_D0_N CSI Port 1 Data Lane 0 Input
5 / 3A CSI1_D0_P CSI Port 1 Data Lane 0 Input
7 / 4A GND Ground
9 / 5A CSI1_D1_N CSI Port 1 Data Lane 1 Input
11 / 6A CSI1_D1_P CSI Port 1 Data Lane 1 Input
13 / 7A GND Ground
15 / 8A CSI1_CLK_N CSI Port 1 CLK Input
17 / 9A CSI1_CLK_P CSI Port 1 CLK Input
19 / 10A GND Ground
21 / 11A CAM2_PWDN Pwr-Dwn (GPIO0-119) Output
23 / 12A CAM2_AUX AUX (GPIO0-120) Bi-Dir
25 / 13A I2C_SCL I2C Clock #3, Mux 1 Output
27 / 14A I2C_SDA I2C Data # 3, Mux 1 Bi-Dir
29 / 15A Power Power, 3.3V Output
Note: In the DIR/Level column, output is to the camera module, input is from the camera module. Bi-Dir signals can be configured as either input or output.