SPRUJ22C November   2021  – September 2024 AWR2944

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Key Features
    3. 1.3 What’s Included
      1. 1.3.1 Kit Contents
      2. 1.3.2 mmWave Out-of-Box (OOB) Demo
  6. 2Hardware
    1. 2.1  Block Diagram
    2. 2.2  PCB Handling Recommendations
    3. 2.3  Power Connections
    4. 2.4  Connectors
      1. 2.4.1 MIPI 60-Pin Connector (J19)
      2. 2.4.2 Debug Connector-60 pin (J7)
      3. 2.4.3 CAN-A Interface Connector (J3)
      4. 2.4.4 CAN-B Interface Connector (J2)
      5. 2.4.5 Ethernet Ports (J4 and J9)
        1. 2.4.5.1 ECOs to Enable the DP83TC812R (AWR2944EVM) or DP83TG720S (AWR2944PEVM) PHY
          1. 2.4.5.1.1 ECO needed to source 25MHz clock from AWR2944P to DP83TG720S
      6. 2.4.6 USB Connectors (J8, J10)
      7. 2.4.7 OSC_CLKOUT Connector (J14)
      8. 2.4.8 PMIC SPI Connector (J16) (DNP)
      9. 2.4.9 Voltage Rails Ripple Measurement Connectors (J1, J5) (DNP)
    5. 2.5  Antenna
    6. 2.6  PMIC
    7. 2.7  On-Board Sensors
    8. 2.8  PC Connection
      1. 2.8.1 XDS110 Interface
      2. 2.8.2 FTDI Interface
    9. 2.9  Connecting the AWR2944EVM/AWR2944PEVM to the DCA1000 EVM
    10. 2.10 Jumpers, Switches, and LEDs
      1. 2.10.1 Switches
      2. 2.10.2 Sense On Power (SOP) Jumpers (J17, J18, J20)
      3. 2.10.3 I2C Connections
      4. 2.10.4 Push Buttons
      5. 2.10.5 LEDs
  7. 3Software
    1. 3.1 Software, Development Tools, and Example Code
  8. 4Hardware Design Files
    1. 4.1 Design Files
  9. 5Compliance Information
    1. 5.1 Requirements for Operating in the EU and UK regions
  10. 6Additional Information
    1.     Trademarks
  11. 7Revision History

2.4.1 MIPI 60-Pin Connector (J19)

This connector provides the standard MIPI 60-pin interface, as shown in Figure 5, for JTAG, CSI2 and trace capability through emulators such as the XDS560pro. Further information on the emulation and trace header can be found in the Emulation and Trace Headers Technical Reference Manual.This connector also provides access to the CSI_RX lanes which allow for playback or feeding external data and bypassing the RF front end, which enables testing and algorithm development on a known dataset.

To use this interface, the JTAG lines from the AWR2944EVM/AWR2944PEVM needs to be muxed to MIPI 60-pin connector. Refer to Section 2.8.1 for more details.

AWR2944EVM, AWR2944PEVM 60-pin MIPI Connector Figure 2-8 60-pin MIPI Connector

Table 2-1 provides the pin assignment details for the MIPI 60-pin connector.

Table 2-1 J19 Pin Assignment
Pin Number Description Pin Number Description
1 MIPI_VREF_DEBUG 2 MIPI_TMS
3 MIPI_TCK 4 MIPI_TDO
5 MIPI_TDI 6 MIPI_NRST
7 MIPI_RTCK 8 MIPI_TRSTPD
9 MIPI_JTAG_NRST 10 NC
11 NC 12 MIPI_VREF_DEBUG
13 TRACE_CLK 14 NC
15 MIPI_DBG_DETECT 16 GND
17 TRACE_CTL 18 NC
19 TRACE_DATA0 20 NC
21 TRACE_DATA1 22 NC
23 TRACE_DATA2 24 NC
25 TRACE_DATA3 26 NC
27 TRACE_DATA4 28 NC
29 TRACE_DATA5 30 NC
31 TRACE_DATA6 32 NC
33 TRACE_DATA7 34 NC
35 NC 36 NC
37 NC 38 NC
39 NC 40 NC
41 NC 42 GND
43 NC 44 CSI2_CLK_P
45 NC 46 CSI2_CLK_N
47 NC 48 GND
49 NC 50 CSI2_1_P
51 NC 52 CSI2_1_N
53 NC 54 GND
55 NC 56 CSI2_0_P
57 GND 58 CSI2_0_N
59 NC 60 GND