SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
WKUP_I2C0, MCU_I2C0, and I2C0 use a an I2C Open Drain Buffer that supports I2C High Speed Mode when operating at 1.8V. At 3.3V the IO does not operate in HS Mode nor does it enable its current source, regardless of the HSMODE and HSMCSE state. There is also a current source on the I2C Open Drain Buffers that will increase the rise time of the open-drain pin by actively pulling up the pin. This signal is controlled by an MMR bit because only one device (the HS Mode Master) may enable its pullup on SCL. The SDA pin uses the same I2C Open Drain Buffer, but the active pullup on SDA is never enabled.
The remaining I2C interfaces on the Device use a standard LVCMOS buffers rather than I2C Open Drain Buffers, and therefore do not support I2C High Speed Mode.