It is initially expected of the clock failure circuits to generate an error until at least one measurement is taken. Therefore, the clock failure interrupts, clock switch, and mute functions should not be enabled immediately, but only after a specific startup procedure.
To start the transmit clock failure check procedure:
- Configure the transmit clock failure detect logic (XMIN, XMAX, XPS) in the transmit clock check control register (MCASP_XCLKCHK).
- Clear the transmit clock failure flag (XCKFAIL) in the transmit status register (MCASP_XSTAT).
- Wait until the first measurement is taken (> 32 AHCLKX clock periods).
- Verify that no clock failure is detected.
- Repeat Step 2 through Step 4 until the clock is running and is no longer issuing clock failure errors.
- After the transmit clock is measured and falls within the acceptable range, the following can be enabled:
- The transmit clock failure interrupt enable bit (XCKFAIL) in the transmitter interrupt control register (MCASP_XINTCTL)
To start the receive clock failure check procedure:
- Configure receive clock failure detect logic (RMIN, RMAX, RPS) in the receive clock check control register (MCASP_RCLKCHK).
- Clear receive clock failure flag (RCKFAIL) in the receive status register (MCASP_RSTAT).
- Wait until first measurement is taken (> 32 AHCLKR clock periods).
- Verify no clock failure is detected.
- Repeat steps 2–4 until clock is running and is no longer issuing clock failure errors.
- After the receive clock is measured and falls within the acceptable range, the following may be enabled:
- the receive clock failure (RCKFAIL) interrupt enable bit in the receive interrupt control register (MCASP_RINTCTL)