SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The following programming model explains how to program the module to transmit an IrDA 60-byte frame with no parity, baud rate = 1.152 Mpbs, and FIFOs disabled.
Step | Register/Bit Field/Programming Model | Value |
---|---|---|
Disable UART mode | UART_MDR1[2-0] MODE_SELECT | 0x7 |
Grant access to the UART_DLL and UART_DLH registers | UART_LCR[7-0] | 0x80 |
Load the baud rate (115.2 kbps) | UART_DLL[7-0] CLOCK_LSB | 0x01 |
UART_DLH[5-0] CLOCK_MSB | 0x00 | |
Set SIR mode | UART_MDR1[2-0] MODE_SELECT | 0x4 |
Disable access to the UART_DLL and UART_DLH registers | UART_LCR[7-0] | 0x00 |
Force output DTR to active | UART_MCR[0] DTR | 1 |
Enable the UART_THR interrupt | UART_IER_IRDA[1] THR_IT | 0x1 |
Set transmit frame length to 60 bytes | UART_TXFLL[7-0] TXFLL | 0x3C |
Set the eight additional starts of frame transmission | UART_EBLR[7-0] EBLR | 0x08 |
SIP is sent at the end of transmission | UART_ACREG[3] SEND_SIP | 1 |