SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
Third Party mode packet reception is accomplished within the UDMA by unpacking and moving data from the Rx Per Channel FIFOs which were filled via the Rx PSI-L Interface to specified memory mapped address ranges via the write only VBUSM master interface. On the Rx side of the UDMA, these transfers are always writes. Each write transfer which is performed by the Third Party Write Unit is to a destination address and of a size as calculated from parameters specified in the Transfer Request packet which was previously received to control the channel behavior.