SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The HBMC provides two sets of Memory Base Address, Memory Configuration and Memory Timing registers to access devices connected to the two external chip selects. The following programming guidelines need to use the correct set of registers depending on which chip select is accessed.
The HBMC compares the input address bits [31-24] to the value programmed in the MCU_FSS0_HPB0_MC_MBAR_y registers to determine the external chip select that is accessed.