SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The DRU supports compression and decompression of data in line by integrating the Accelerator Framework Compression (AFC) module inside the response buffer path.
The compression logic places the AFC module between the Read Response Buffer and a dedicated write engine for compression and a dedicated write engine of decompression. The read response buffer handles any out of order responses and then the data is pushed into FIFOs inside the AFC module. The AFC module pulls the data out of the FIFOs as 128-bit elements for compression or 128 CDBs for decompression.
Once the 128-bit entry is removed from the FIFO the symbol size specified for the compression is used to split the 128-bit element into the corresponding number of symbols. If the 128-bit does not divide into an even number of symbols then the remain bits are used with the next 128-bit element to create the first symbol. Once each symbol is determined then they are passed into the compression pipeline. The first stage of the compression pipeline is the difference phase. If it is a non-differential compression algorithm then a fixed bias value is subtracted from the symbol. If it is a differential compression algorithm then the symbol is subtracted from a symbol that is from a previous slot. If there was not data at the previous slot selected it will be zero until actual data is present.
The AFC module packs a byte stream into a set of 128-bit CDB that is defined as a super block. At the end of each super block the compression engine will generate a 8-byte write of the CDB information block. These CDB information blocks can then be read back in when decompressing the data to know the size location and decompression information to recreate the original data.
Table 10-221 through Table 10-220 show the templates used to setup the compression and decompression.
word 15 | word 14 | word 13 | word 12 | |
CDB3 Offset from ADDR | CDB3 Format | CDB2 Offset from ADDR | CDB2 Format | |
word 11 | word 10 | word 9 | word 8 | |
CDB1 Offset from ADDR | CDB1 Format | CDB0 Offset from ADDR | CDB0 Format | |
word 7 | word 6 | word 5 | word 4 | |
Max Offset/CDB Table Start Offset | DSTDIM0 | SRCDIM0 | SB ICNT1 | SB ICNT0 |
word 3 | word 2 | word 1 | word 0 | |
Compression Flags | SECONDARY TR FLAGS | ADDR of Compressed Data |
Word | Field | Description |
---|---|---|
0-1 | ADDR of Compressed Data | The Location of where the compressed data starts. |
2 | Secondary TR FLAGS | The Secondary TR Flags that are common for all secondary TRs |
3 | Compression Flags | The Compression Flags used for the compression |
4 | SBICNT0 & SBICNT1 | The size of the super block for the compression |
5 | DSTDIM0 | The dimension to use for DICNT0 in the original TR after each super block |
6 | SRCDIM0 | The dimension to use for ICNT0 in the original TR after each super block is complete |
7 | Max Offset CDB Table Start Offset | For a compression TR this is the maximum offset value that can be written in the CDB table. This means that compressed data will not be written beyond ADDR + Max Offset. For a decompression TR this is the offset from the secondary TR that the first CDB entry should be read from in bytes. It is a signed value. |
8 | CDB0 Format | This is the format data for the first CDB table value written after the first super block. It will never be used in an initial fetch. |
9 | CDB0 Offset | This is where the CDB data for this entry begins relative to the ADDR of Compressed data and is always a positive number. |
Bit | Field | Description |
---|---|---|
0-3 | SEC_TR_TYPE | 0: Multiple Buffer Interleave 1: CDB INFO Block and Decompression/Compression Configuration |
4-31 | SB_DIM0 | The dimension to use between lines of the super block. Lower 4 bits are always 0 since minimum element size is 16 byte element. |
Bit | Field | Description |
---|---|---|
0-3 | Compression Algorithm | 0: Zero Based Algorithm 1: Unsigned Golumb 2: Signed Golumb 3-7: Reserved for Future Use 8-15: Differential Type see the Differential Compression Flags Definition |
5-4 | SB_AM0 | The addressing mode to use for the super block during ICNT0 is decrementing. This is only used if the TR is using circular addressing for the direction of the compression engine. |
6-7 | SB_AM1 | The addressing mode to use for the super block when SB_ICNT1 is decremented. This is only used if the TR is using circular addressing for the direction of the compression engine. |
8-15 | Bias | The constant value subtracted from the symbol before the compression algorithm is applied |
16-31 | RSVD | Reserved for future use |
Bit | Field | Description |
---|---|---|
0-3 | Compression Algorithm | 0-7: Non-differential algorithms. See Table 10-219 8: Signed Exponential Golumb with differential logic 9-15: Reserved for Future use |
5-4 | SB_AM0 | The addressing mode to use for the super block during ICNT0 is decrementing. This is only used if the TR is using circular addressing for the direction of the compression engine. |
6-7 | SB_AM1 | The addressing mode to use for the super block when SB_ICNT1 is decremented. This is only used if the TR is using circular addressing for the direction of the compression engine. |
8-9 | Initial k value | The k value to be used for the initial super block. K value for later super blocks will be based upon the optimal k value calculation logic along with the Update K field. This is combined with the symbol size. 8-bit symbol 0: k = 0 1: k = 1 2: k = 2 3: k = 3 12-bit symbol 0: k = 4 1: k = 5 2: k = 6 3 k = 7 16-bit symbol 0: k = 8 1: k = 9 2; k = 10 3: k = 11 |
11-10 | RSVD | Reserved for future use |
12-13 | Update K Value | Describes how the k value changes from one super block to the next. 0: K is constant and uses the Initial K value specified in the Compression Flags Field 1: K value moves by 1 towards the calculated optimal value. 2: K value moves instantly to the calculated optimal value |
14-15 | RSVD | Reserved for future use |
16-18 | Symbol Size | The size of a signal symbol used for compression 0: 8-bit symbol 1: 12-bit symbol 2: 16-bit symbol 3-7: Reserved for Future Use |
19 | RSVD | Reserved for future use |
22-20 | Number of Differences | The number of elements to use in the differential logic 0: No subtraction 1: all symbols use SubSel0 field to determine which symbols are used 2: SubSel0 is used for even symbols and SubSel1 is used for the odd symbols 3: repeating pattern of 3 using SubSel0, SubSel1,SubSel2 4: repeating pattern of 4 using SubSel0, SubSel1, SubSel2 and SubSel3 5-7: Reserved for future Use |
23 | RSVD | Reserved for future use |
24-25 | SubSel0 | Selection for the subtraction module 0: Current symbol uses the adjacent symbol 1: Current symbol uses the symbol 2 spaces away 2: Current symbol uses the symbol 3 spaces away 3: Current symbol uses the symbol 4 spaces away |
26-27 | SubSel1 | Selection for the subtraction module 0: Current symbol uses the adjacent symbol 1: Current symbol uses the symbol 2 spaces away 2: Current symbol uses the symbol 3 spaces away 3: Current symbol uses the symbol 4 spaces away |
28-29 | SubSel2 | Selection for the subtraction module 0: Current symbol uses the adjacent symbol 1: Current symbol uses the symbol 2 spaces away 2: Current symbol uses the symbol 3 spaces away 3: Current symbol uses the symbol 4 spaces away |
30-31 | SubSel3 | Selection for the subtraction module 0: Current symbol uses the adjacent symbol 1: Current symbol uses the symbol 2 spaces away 2: Current symbol uses the symbol 3 spaces away 3: Current symbol uses the symbol 4 spaces away |