SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The time taken to output a frame on the PPI needs to match what is coming in on the DPI. This is best achieved by using the recommended clock ratio between the pixel and byte clocks. Assuming that is the case, then the blanking and active data periods must be matched up.
For each frame of video the time will be:
(Vtotal*Htotal)@pixel_clk = (Vtotal*Htotal)@tx_byte_clk × bits_per_pixel/8;
So for example, the time for a full HD frame 1920x1080 with reduced blanking in RGB565 will be:
2200x1200 pixels = 2200x1200 tx_bytes × 16/8;
The DSITX controller will slave its frame timing to the incoming DPI vsync, as long as it is programmed to generate a frame of slightly less than the same size when the VFP blanking is considered. The controller works by transitioning to LP during the last programmed line of VFP. It will then remain in LP until the start of the next frame. So programming the controller to match the DPI, but with at least one fewer line of VFP should result in a reliable configuration.