SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The host initiates a RX channel teardown by setting the PDMA_PSILCFG_RX_RT_ENABLE[30] TDOWN bit for the target RX channel. The PDMA communicates the teardown state to the paired-DMA through the PSI-L data channel, to ensure that the teardown is not seen by the paired-DMA until all the previous PDMA data for the channel has been flushed.
The PDMA will not stop reading peripheral data until it reaches a FIFO boundary as configured through the 'X' and 'Y' parameters in the static TR. It will always attempt to complete the 'Y' count for the current event being processed. Upon reaching a stopping point, the PDMA will then clear the ENABLE bit in the pairing register, however the TDOWN bit will remain set. No further packet processing will occur until the host re-configures the channel. The teardown process will propagate to the paired-DMA and its final status can be checked there.