SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
If the TR type is a cache warm the format flags field is replaced with a Cache Flags field.
Table 10-82 shows the breakdown of the 32 bit Cache Flags field.
31 | 24 | 23 | 16 | ||||||||||||
CACHE OPERATION | RESERVED | ||||||||||||||
15 | 8 | 7 | 0 | ||||||||||||
RESERVED | CACHE ID |
The flags field fills in the remaining details about the stream, as follows:
Bit | Field | Description |
---|---|---|
24-31 | Cache Operation | 0: Prewarm the Cache
1: Prewarm MMU 2-255: Reserved for future use |
8-23 | Reserved | Reserved for future use |
0-7 | Cache ID | The Cache number to perform the operation on. 0-254: Cores. 255: L3 Cache |