SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The host initiates a channel teardown by setting the TDOWN bit in the paired-DMA (BCDMA/PKTDMA) channel that is paired with the PDMA. The paired-DMA communicates the teardown state through the PSI-L data channel, to ensure that the teardown is not seen by the PDMA until all the previous paired-DMA data for the channel has been flushed. At this time, the teardown state will be reflected in the PDMA_PSILCFG_TX_RT_ENABLE[30] TDOWN bit. Note that a non-synchronized teardown can also be initiated by directly clearing the PDMA_PSILCFG_TX_RT_ENABLE[31] ENABLE.
Once all data has been flushed from the PDMA to the peripheral, the enable state of the PDMA channel will be cleared in the PDMA_PSILCFG_TX_RT_ENABLE register, but the teardown bit will remain high. Upon completion, no further packet processing will occur until the host re-configures the channel. If the channel fails to teardown because the peripheral has stopped responding, or if the paired-DMA transmission stops on a data boundary that is not compatible with the static TR configuration, the PDMA_PSILCFG_TX_RT_ENABLE[28] FLUSH bit can be set to guarantee that all data can be properly flushed from the internal pipe.