SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
This chapter details the USB subsystem environment.
Table 12-129 describes the external signals of the USB3SS0 subsystem.
Device Pin | I/O(1) | Description |
---|---|---|
DP | I/O | USB2.0 data pins. These are HS/FS/LS bidirectional differential data lane (D+/D-) |
DM | I/O | |
SSRX1P (SSRX2P) | I | USB3.0 differential data receive lane (RX+ pin) |
SSRX1N (SSRX2N) | I | USB3.0 differential data receive lane (RX- pin) |
SSTX1P (SSTX2P) | O | USB3.0 differential data transmit lane (TX+ pin) |
SSTX1N (SSTX2N) | O | USB3.0 differential data transmit lane (TX- pin) |
REXT | A/I | USB3.0 SerDes external calibration resistor. Requires a 3.01 kOhm ±1% accurate off-chip resistor connected from this pin to ground. |
ID | A/I | USB cable identifier (A/B-device). Analog ID pin sense with internal pull-up |
VBUS | A/I | An 3.3-V analog input for monitoring the voltage on VBUS (VBUS sense). 5-V VBUS must be applied via an external resistive divider /3. For example, R1 = 20 kOhm and R2 = 10 kOhm |
DRVVBUS | O | A digital output signal for VBUS Power Supply Enabling. Used to enable an external charge pump or power switch to supply +5V power to the VBUS port, when appropriate |
RCALIB | A/I | External resistor for USB2.0 PHY calibration. Requires a 500 Ohm ±1% off-chip resistor connected from this pin to ground |