- Setting the timeout bit is required to enable notification for ECC serial
interface timeout errors. The parity bit must be set to enable notification for
parity errors. To enable the timeout (bit 1) and parity (bit 0) bits, write 0x1
to the ECC_AGGR_ENABLE_SET register.
- Write 0x1 to the ECC_SEC_ENABLE_SET_REGx (to enable correctable SEC error
interrupts) and ECC_DED_ENABLE_SET_REGx (to enable uncorrectable DED error
interrupts) registers for required endpoints.
The following register configurations
are per endpoint and done through the SVBUS programming interface. Refer to GUID-A5D9857B-CA67-4338-B859-5FE85784FAAA.html for more
information.
- Write 0x1 to the ECC_CHECK
field of the ECC_CBASS_CTRL register to enable ECC check for interconnect
endpoints.
- Write 0x1 to the ENABLE_RMW,
ECC_CHECK and ECC_ENABLE bit fields of the ECC_CTRL register to enable ECC
check for wrapper type endpoints.