SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
Mailbox module serves to facilitate the communication between the various on-chip processors of the device by providing a queued mailbox-interrupt mechanism.
The queued mailbox-interrupt mechanism allows the software to establish a communication channel between two processors (users) through a set of registers and associated interrupt signals.
Instance | Domain | ||
WKUP | MCU | MAIN | |
MAILBOX0 | - | - | ✓ (NAVSS) |
MAILBOX1 | - | - | ✓ (NAVSS) |