SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
In this example configuration, pipeline 2 is used for LDC. The LDC output is stored into DDR, and connected to MSC0 and NF concurrently.
The LDC DMA connection are these: DMA272 (Y12), DMA273 (UV12), DMA274 (Y8), DMA275 (UV8)
The DMA connections for MSC and NF are as follows:
The parameters assumed for this example is: LDC OBW = 32, OBH = 32, Frame width = 1920
For more details on LDC configuration, see Section VPAC Lens Distortion Correction (LDC).