The DSC Encoder supports the following main features:
- Maximum image width and height per encoder slice can be configured with up to 8K
- Programmable slice width and height
- All slices must be the same height, including the final slice of the picture
- 8 bits/component (24 bits/pixel)
- 10 bits/component (30 bits/pixel)
- An encoder built for 10 bits/component will be able to run in either 8 or 10 bits/component mode based on a register value
- RGB/YCbCr with 4:4:4 sampling support only on the input streams
- Single or Dual Pixel input(s)
- Single pixel input (one encoder slice processing only)
- Dual pixel inputs
- Split Panel (Left/Right) streams – requires low skew between streams
- Support for all DSC 1.1 encoding mechanisms
- MMAP, BP, MPP predictions and ICH
- Flatness detection and signaling
- Supports CBR (Constant Bit Rate) mode only - Configurable target bpp (bits per pixel), non-integer values supported. The following modes are available:
- 8 bpp and 12 bpp compressed bit rates for 8 bits/component - Corresponds to 3:1 and 2:1 compression
- 10 bpp and 15 bpp compressed bit rates for 10 bits/component - Corresponds to 3:1 and 2:1 compression
- 12 bpp and 18 bpp compressed bit rates for 12 bits/component
- Each Hard Slice encoder instance can be configured (with the parameter NB_SS_ENC) to support the following number of slices per line
- Supports 1 or 2 slices (soft slices) per line
- When configured with support for 2 slices per line, the encoder support dynamically the configuration of both 1 and 2 slices per line.
- Thus a total of up to 4 slices per line can be supported with two Hard Slice Encoders
- Encoder data flow supported:
- Synchronous Streaming mode – no back pressure support
- Implements the following active internal diagnostic mechanisms:
- Self-Checking during VBLANK
- Control output diagnostics
- SRAM Protection
- Configuration and Status Register (CSR) Protection
- Fault avoidance mechanism