SPRUJ28E November 2021 – September 2024 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
Up to 128 filter elements can be configured for 11-bit standard IDs. When accessing a Standard Message ID Filter element, its address is the Filter List Standard Start Address MCAN_SIDFC[15-2] FLSSA field plus the index of the filter element (0-127).
Figure 12-109 shows Standard Message ID Filter element structure.
Table 12-302 shows Standard Message ID Filter element field descriptions.
Word | Bits | Field Name | Description | ||
---|---|---|---|---|---|
S0 | 31-30 | SFT[1-0] | Standard Filter Type
Note: With SFT = 11 the filter element is disabled and the acceptance filtering continues (same behaviour as with SFEC = 000) | ||
29-27 | SFEC[2-0] | Standard Filter Element Configuration All enabled filter elements are used for acceptance filtering of standard frames. Acceptance filtering stops at the first matching enabled filter element or when the end of the filter list is reached. If SFEC = 100, 101, or 110 a match sets interrupt flag MCAN_IR[8]HPM and, if enabled, an interrupt is generated. In this case the MCAN_HPMS register is updated with the status of the priority match.
| |||
26-16 | SFID1[10-0] | Standard Filter ID 1 When filtering for Rx Buffers this field defines the ID of a standard message to be stored. The received identifiers must match exactly, no masking mechanism is used. | |||
15-11 | RES | Reserved | |||
10-0 | SFID2[10-0] | Standard Filter ID 2 This bit field has a different meaning depending on the configuration of SFEC:
| |||
SFID2[10-9] | This field is decides whether the received message is stored into an Rx Buffer or treated as message A, B, or C of the debug message sequence.
Note: Debug feature is not supported. | ||||
SFID2[8-6] | This field is used to control the filter event pins at the Extension Interface. A one at the respective bit position enables generation of a pulse at the related filter event pin with the duration of one MCAN_ICKL period in case the filter matches. Note: Only three filter event pins are supported. | ||||
SFID2[5-0] | This field defines the offset to the Rx Buffer Start Address MCAN_RXBC[15-2] RBSA field for storage of a matching message. |