SPRUJ40C
may 2022 – may 2023
1
Abstract
Trademarks
1
EVM Revisions and Assembly Variants
2
System Description
2.1
Key Features
2.1.1
Thermal Compliance
2.1.2
Processor
2.1.3
Power Supply
2.1.4
Memory
2.1.5
JTAG/Emulator
2.1.6
Supported Interfaces and Peripherals
2.1.7
Expansion Connectors/Headers to Support Application Specific Add‐On Boards
2.2
Functional Block Diagram (SK-AM62 and SK-AM62B)
2.3
Functional Block Diagram (SK-AM62-P1 and SK-AM62B-P1)
2.4
AM62x SKEVM Interface Mapping
2.5
Power ON/OFF Procedures
2.5.1
Power-On Procedure
2.5.2
Power-Off Procedure
2.5.3
Power Test Points
2.6
Peripheral and Major Component Description
2.6.1
Clocking
2.6.1.1
Peripheral Ref Clock
2.6.2
Reset
2.6.3
OLDI Display Interface
2.6.4
CSI Interface
2.6.5
Audio Codec Interface
2.6.6
HDMI Display Interface
2.6.7
JTAG Interface
2.6.8
Test Automation Header
2.6.9
UART Interface
2.6.10
USB Interface
2.6.10.1
USB 2.0 Type A Interface
2.6.10.2
USB 2.0 Type C Interface
2.6.11
Memory Interfaces
2.6.11.1
DDR4 Interface
2.6.11.2
OSPI Interface
2.6.11.3
MMC Interfaces
2.6.11.3.1
MMC0 - eMMC Interface
2.6.11.3.2
MMC1 - Micro SD Interface
2.6.11.3.3
MMC2 - Wilink Interface
2.6.11.4
EEPROM
2.6.12
Ethernet Interface
2.6.12.1
CPSW Ethernet PHY 2 Default Configuration
2.6.12.2
CPSW Ethernet PHY 1 Default Configuration
2.6.13
GPIO Port Expander
2.6.14
GPIO Mapping
2.6.15
Power
2.6.15.1
Power Requirements
2.6.15.2
Power Input
2.6.15.3
Power Supply
2.6.15.4
Power Sequencing
2.6.15.5
AM62x SoC Power
2.6.15.6
Current Monitoring
2.6.16
AM62x SKEVM User Setup/Configuration
2.6.16.1
EVM DIP Switches
2.6.16.2
Boot Modes
2.6.16.3
User Test LEDs
2.6.17
Expansion Headers
2.6.17.1
PRU Connector
2.6.17.2
User Expansion Connector
2.6.17.3
MCU Connector
2.6.18
Interrupt
2.6.19
I2C Address Mapping
3
Known Issues and Modifications
3.1
Issue 1 - HDMI/DSS Incorrect Colors on E1
3.2
Issue 2 - J9 and J10 Header Alignment on E1
3.3
Issue 3 - USB Boot descoped on E1
3.4
Issue 4 - OLDI Connector Orientation and Pinout
3.5
Issue 5 - Bluetooth descoped on E2 EVMs
3.6
Issue 6 - Ethernet PHY CLK Skew Default Strapping Changes
3.7
Issue 7 - TEST_POWERDOWN changes
3.8
Issue 8 - MMC1_SDCD spurious interrupts
3.9
Issue 9 - PD Controller I2C2 IRQ Not Pinned Out
3.10
Issue 10 - INA Current Monitor Adress Changes
3.11
Issue 11 - Test Automation I2C Buffer Changes
Regulatory Compliance
Revision History
2.6.11
Memory Interfaces