SPRUJ40C may 2022 – may 2023
The USB 2.0 HOST Interface is offered through a USB Type-A Port on the USB1 controller on the AM62x SoC.
The USB Signals are connected on E1 to a USB 2.0 HUB Mfr Part# TUSB4020BI to provide two USB 2.0 Host ports. TUSB4020BI is a two port USB 2.0 HUB, which provides USB high-speed/full-speed connections on the upstream port and provides USB high-speed, full-speed, or low-speed connections on the downstream ports. On-chip 24 MHz crystal is used to provide clock to the USB HUB. USB0_DRVVBUS from SoC is connected to USB_VBUS pin of the HUB through resistor divider network to limit the voltage level below 1.155 V. The Reset to the HUB is given by SoC RESETSTATz output.
The GANGED/SMBA2/HS_UP pin and FULLPWRMGMTz/ SMBA1 pin of USB HUB are pulled down to enable individual power control of the ports when power switching is enabled. The PWRCTL_POL pin of USB HUB is pulled down to make PWRCTL polarity active high. The PWRCTL1/BATEN1 pin and PWRCTL2/BATEN2 pin of HUB is connected to enable pins of Current limit switches for VBUS supply control on downstream ports. The USB2.0 ports shall provide maximum of 500 mA, 5 V to the devices as per USB2.0 specifications. The USB HUB strapping options are provided as follows.
On E2 and future revisions, the USB Hub has been dropped in favor of connecting the onboard USB Controller directly to a single Type-A connector.
USB Data lines from Type-A connectors are connected to the Current Limit Load Switch and ESD Protection IC Mfr Part# TPD3S014DBVR. This switch limits the current to 500mA and dissipates the ESD strikes above the maximum level specified in the IEC 61000-4-2.
The USB HUB is powered by 3.3V from board IO supply and the 1.1V supply from Dedicated LDO Mfr Part# TLV75511PDQNR.