SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Quadrature Decoder Control .
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Instance Name | Physical Address |
---|---|
EQEP0 | 5027 0028h |
EQEP1 | 5027 1028h |
EQEP2 | 5027 2028h |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
QSRC | SOEN | SPSEL | XCR | SWAP | IGATE | QAP | |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
0h | 0h | 0h | 0h | 0h | 0h | 0h | |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
QBP | QIP | QSP | RESERVED_1 | QIDIRE | |||
R/W | R/W | R/W | R | R/W | |||
0h | 0h | 0h | 0h | 0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:14 | QSRC | R/W | 0h | Position-counter source selection |
13 | SOEN | R/W | 0h | Sync output-enable 1 Enable position-compare sync output 0 Disable position-compare sync output |
12 | SPSEL | R/W | 0h | Sync output pin selection 1 Strobe pin is used for sync output 0 Index pin is used for sync output |
11 | XCR | R/W | 0h | External Clock Rate 1 1x resolution: Count the rising edge only 0 2x resolution: Count the rising/falling edge |
10 | SWAP | R/W | 0h | CLK/DIR Signal Source for Position Counter 1 Quadrature-clock inputs are swapped 0 Quadrature-clock inputs are not swapped |
9 | IGATE | R/W | 0h | Index pulse gating option 1 Gate the index pin with strobe 0 Disable gating of Index pulse |
8 | QAP | R/W | 0h | QEPA input polarity 1 Negates QEPA input 0 No effect |
7 | QBP | R/W | 0h | QEPB input polarity 1 Negates QEPB input 0 No effect |
6 | QIP | R/W | 0h | QEPI input polarity 1 Negates QEPI input 0 No effect |
5 | QSP | R/W | 0h | QEPS input polarity 1 Negates QEPS input 0 No effect |
4:1 | RESERVED_1 | R | 0h | Reserved |
0 | QIDIRE | R/W | 0h | 0 - Compatible mode, Behavior same as existing devices 1 - Enhancement for Direction change during Index will be enabled |