SPRUJ66A February   2023  – December 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Revisions and Assembly Variants
  5. 2Inside the Box
  6. 3EMC, EMI, and ESD Compliance
  7. 4System Description
    1. 4.1 Key Features
      1. 4.1.1 Processor
      2. 4.1.2 Power Supply
      3. 4.1.3 Memory
      4. 4.1.4 JTAG Emulator
      5. 4.1.5 Supported Interfaces and Peripherals
      6. 4.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 4.2 Functional Block Diagram
    3. 4.3 AM62A Low Power SK EVM Interface Mapping
    4. 4.4 Power ON/OFF Procedures
      1. 4.4.1 Power-On Procedure
      2. 4.4.2 Power-Off Procedure
      3. 4.4.3 Power Test Points
    5. 4.5 Peripheral and Major Component Description
      1. 4.5.1  Clocking
        1. 4.5.1.1 Peripheral Ref Clock
      2. 4.5.2  Reset
      3. 4.5.3  CSI Interface
      4. 4.5.4  Audio Codec Interface
      5. 4.5.5  HDMI Display Interface
      6. 4.5.6  JTAG Interface
      7. 4.5.7  Test Automation Header
      8. 4.5.8  UART Interface
      9. 4.5.9  USB Interface
        1. 4.5.9.1 USB 2 0 Type A Interface
        2. 4.5.9.2 USB 2 0 Type C Interface
      10. 4.5.10 Memory Interfaces
        1. 4.5.10.1 LPDDR4 Interface
        2. 4.5.10.2 OSPI Interface
        3. 4.5.10.3 MMC Interfaces
          1. 4.5.10.3.1 MMC0 - eMMC Interface
          2. 4.5.10.3.2 MMC1 - Micro SD Interface
          3. 4.5.10.3.3 MMC2 - M.2 Key E Interface
        4. 4.5.10.4 Board ID EEPROM
      11. 4.5.11 Ethernet Interface
        1. 4.5.11.1 CPSW Ethernet PHY Default Configuration
      12. 4.5.12 GPIO Port Expander
      13. 4.5.13 GPIO Mapping
      14. 4.5.14 Power
        1. 4.5.14.1 Power Requirements
        2. 4.5.14.2 Power Input
        3. 4.5.14.3 Power Supply
        4. 4.5.14.4 AM62A SoC Power
        5. 4.5.14.5 Current Monitoring
      15. 4.5.15 AM62A Low Power SK EVM User Setup and Configuration
        1. 4.5.15.1 Boot Modes
        2. 4.5.15.2 User Test LEDs
      16. 4.5.16 Expansion Headers
        1. 4.5.16.1 User Expansion Connector
        2. 4.5.16.2 MCU Connector
      17. 4.5.17 I2C Address Mapping
  8. 5Revision History

4.5.5 HDMI Display Interface

The DSS (Display Sub system) interface from AM62A SOC is used on the SKEVM to provide a HDMI Interface through a standard Type-A Connector. The SKEVM features a SiI9022A HDMI Transmitter from Lattice semiconductors to convert the 24bit Parallel RGB DSS output stream as well as McASP1 signals to a HDMI-compliant digital audio and video signal.

The Data mapping format used is RGB888. The data bus width is 24-bits.

In order to use the SiI9022A, the SOC needs to setup the device. This is done via theI2C1 interface between the SOC and the SiI9022A. SoC_I2C1 instance connected to the HDMI Transmitter accesses the compatible mode registers, the TPI registers, and the CPI registers. Audio Data is sent from the SOC to HDMI transmitter through the McASP1 instance. HDMI_I2C Bus accesses the EDID and HDCP data on an attached sink device.

TMDS Differential data pairs along with the differential clock signals from the transmitter are connected to the HDMIconnector through HDMI ESD device Mfr Part# TPD12S016PWR which also acts as a load switch to limit current supplied to the HDMI connector from board 5V supply.

The HDMI Framer is powered using 3.3V Board IO Supply and 1.2V for the AVCC & DVCC supply by a dedicated LDO.

GUID-20221013-SS0I-7892-XKXC-WHJCHPKVBML9-low.png Figure 4-14 HDMI Interface block diagram