SPRUJ66A February   2023  – December 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Revisions and Assembly Variants
  5. 2Inside the Box
  6. 3EMC, EMI, and ESD Compliance
  7. 4System Description
    1. 4.1 Key Features
      1. 4.1.1 Processor
      2. 4.1.2 Power Supply
      3. 4.1.3 Memory
      4. 4.1.4 JTAG Emulator
      5. 4.1.5 Supported Interfaces and Peripherals
      6. 4.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 4.2 Functional Block Diagram
    3. 4.3 AM62A Low Power SK EVM Interface Mapping
    4. 4.4 Power ON/OFF Procedures
      1. 4.4.1 Power-On Procedure
      2. 4.4.2 Power-Off Procedure
      3. 4.4.3 Power Test Points
    5. 4.5 Peripheral and Major Component Description
      1. 4.5.1  Clocking
        1. 4.5.1.1 Peripheral Ref Clock
      2. 4.5.2  Reset
      3. 4.5.3  CSI Interface
      4. 4.5.4  Audio Codec Interface
      5. 4.5.5  HDMI Display Interface
      6. 4.5.6  JTAG Interface
      7. 4.5.7  Test Automation Header
      8. 4.5.8  UART Interface
      9. 4.5.9  USB Interface
        1. 4.5.9.1 USB 2 0 Type A Interface
        2. 4.5.9.2 USB 2 0 Type C Interface
      10. 4.5.10 Memory Interfaces
        1. 4.5.10.1 LPDDR4 Interface
        2. 4.5.10.2 OSPI Interface
        3. 4.5.10.3 MMC Interfaces
          1. 4.5.10.3.1 MMC0 - eMMC Interface
          2. 4.5.10.3.2 MMC1 - Micro SD Interface
          3. 4.5.10.3.3 MMC2 - M.2 Key E Interface
        4. 4.5.10.4 Board ID EEPROM
      11. 4.5.11 Ethernet Interface
        1. 4.5.11.1 CPSW Ethernet PHY Default Configuration
      12. 4.5.12 GPIO Port Expander
      13. 4.5.13 GPIO Mapping
      14. 4.5.14 Power
        1. 4.5.14.1 Power Requirements
        2. 4.5.14.2 Power Input
        3. 4.5.14.3 Power Supply
        4. 4.5.14.4 AM62A SoC Power
        5. 4.5.14.5 Current Monitoring
      15. 4.5.15 AM62A Low Power SK EVM User Setup and Configuration
        1. 4.5.15.1 Boot Modes
        2. 4.5.15.2 User Test LEDs
      16. 4.5.16 Expansion Headers
        1. 4.5.16.1 User Expansion Connector
        2. 4.5.16.2 MCU Connector
      17. 4.5.17 I2C Address Mapping
  8. 5Revision History

4.5.16.1 User Expansion Connector

The AM62A Low Power SK EVM supports RPi expansion interface using a 40-pin User expansion connector Mfr. Part# PEC20DAAN.Three mounting holes are oriented with the connector to allow for connection of these HAT boards.

The following interfaces and IOs are included on to the 40 pin User Expansion connector:

  • 2x SPI : SPI0 with 2 CS and SPI2 with 3 CS
  • 2x I2C: SoC_I2C0 and SoC_I2C2
  • 1x UART: UART5
  • 2x PWM: EHRPWM0_A, EHRPWM1_B
  • 1x CLK: CLKOUT0
  • 10x GPIO: GPIOs from main domain
  • 5V and 3.3V supply (current limited to 155mA and 500mA)

Each of the power supplies 5V and 3.3V are current limited to 155mA and 500mA respectively. This is achieved byusing two individual load switch TPS22902YFPR and TPS22946YZPR. Enable for the load switches are controllable by an I2C based GPIO Port expander.

Signals routed from User Expansion connector are listed in the table below.

Table 4-17 40 Pin Power Connector Pinout
Pin No. SoC Ball Net name
1 - VCC3V3_EXP
2 - VCC5V0_EXP
3 M20 EXP_I2C2_SDA
4 - VCC5V0_EXP
5 M22 EXP_I2C2_SCL
6 - DGND
7 B16 EXP_CLKOUT0
8 C18 EXP_UART5_TXD
9 - DGND
10 B17 EXP_UART5_RXD
11 A19 EXP_SPI2_CS1
12 A21 EXP_SPI2_CLK
13 M21 EXP_GPIO0_42
14 - DGND
15 F14 EXP_GPIO1_22
16 R17 EXP_GPIO0_38
17 - VCC3V3_EXP
18 K17 EXP_GPIO0_39
19 B15 EXP_SPI0_D0
20 - DGND
21 E15 EXP_SPI0_D1
22 G20 EXP_GPIO0_14
23 A17 EXP_SPI0_CLK
24 D16 EXP_SPI0_CS0
25 - DGND
26 C16 EXP_SPI0_CS1
27 E16 SoC_I2C0_SDA
28 D17 SoC_I2C0_SCL
29 M18 EXP_GPIO0_36
30 L18 EXP_GPIO0_32
31 L17 EXP_GPIO0_33
32 K18 EXP_GPIO0_40/ PR0_ECAP0_IN_APWM_OUT
33 B20 EXP_EHRPWM1_B
34 - DGND
35 B21 EXP_SPI2_CS0/EHRPWM0_A
36 B18 EXP_SPI2_CS2
37 M19 EXP_GPIO0_41
38 B19 EXP_SPI2_D1/ECAP2_IN_APWM_OUT
39 - EXP_HAT_DETECT
40 C19 EXP_SPI2_D0