SPRUJ66A
February 2023 – December 2023
1
Abstract
Trademarks
1
EVM Revisions and Assembly Variants
2
Inside the Box
3
EMC, EMI, and ESD Compliance
4
System Description
4.1
Key Features
4.1.1
Processor
4.1.2
Power Supply
4.1.3
Memory
4.1.4
JTAG Emulator
4.1.5
Supported Interfaces and Peripherals
4.1.6
Expansion Connectors Headers to Support Application Specific Add On Boards
4.2
Functional Block Diagram
4.3
AM62A Low Power SK EVM Interface Mapping
4.4
Power ON/OFF Procedures
4.4.1
Power-On Procedure
4.4.2
Power-Off Procedure
4.4.3
Power Test Points
4.5
Peripheral and Major Component Description
4.5.1
Clocking
4.5.1.1
Peripheral Ref Clock
4.5.2
Reset
4.5.3
CSI Interface
4.5.4
Audio Codec Interface
4.5.5
HDMI Display Interface
4.5.6
JTAG Interface
4.5.7
Test Automation Header
4.5.8
UART Interface
4.5.9
USB Interface
4.5.9.1
USB 2 0 Type A Interface
4.5.9.2
USB 2 0 Type C Interface
4.5.10
Memory Interfaces
4.5.10.1
LPDDR4 Interface
4.5.10.2
OSPI Interface
4.5.10.3
MMC Interfaces
4.5.10.3.1
MMC0 - eMMC Interface
4.5.10.3.2
MMC1 - Micro SD Interface
4.5.10.3.3
MMC2 - M.2 Key E Interface
4.5.10.4
Board ID EEPROM
4.5.11
Ethernet Interface
4.5.11.1
CPSW Ethernet PHY Default Configuration
4.5.12
GPIO Port Expander
4.5.13
GPIO Mapping
4.5.14
Power
4.5.14.1
Power Requirements
4.5.14.2
Power Input
4.5.14.3
Power Supply
4.5.14.4
AM62A SoC Power
4.5.14.5
Current Monitoring
4.5.15
AM62A Low Power SK EVM User Setup and Configuration
4.5.15.1
Boot Modes
4.5.15.2
User Test LEDs
4.5.16
Expansion Headers
4.5.16.1
User Expansion Connector
4.5.16.2
MCU Connector
4.5.17
I2C Address Mapping
5
Revision History
4.2
Functional Block Diagram
The functional block diagram of the AM62A Low Power SKEVM Board is shown below:
Figure 4-6
Block Diagram - Rev E1 and E2
Figure 4-7
Block Diagram - Rev E3 and A