SPRUJ69 December   2022 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features
    3. 1.3 Thermal Compliance
    4. 1.4 Reach Compliance
    5. 1.5 EMC, EMI, and ESD Compliance
  3. 2User Interfaces
    1. 2.1 Power Inputs
    2. 2.2 Power Input [J7_CP] with LED for Status [LD2_CP][LD3_CP]
      1. 2.2.1 Power Control [SW2_CP] with LED for Status [LD5_CP] [LD6_CP] [LD7_CP]
      2. 2.2.2 Power Budget Considerations
    3. 2.3 User Inputs
      1. 2.3.1 Board Configuration Settings [SW3_CP] [SW13_CP] [SW3_SOM]
      2. 2.3.2 Boot Configuration Settings [SW9_CP] [SW8_CP]
      3. 2.3.3 Reset Pushbuttons [SW7_CP] [SW6_CP] [SW5_CP] [SW4_CP]
      4. 2.3.4 User Pushbuttons [SW2] [SW11] [SW10] [SW1] [SW12] with User LED Indication [LD9] [LD8]
    4. 2.4 Standard Interfaces
      1. 2.4.1 Uart-Over-USB [J43_CP] [J44_CP] with LED for Status [LD10_CP] [LD11_CP]
      2. 2.4.2 Gigabit Ethernet [J35_CP] with Integrated LEDs for Status
      3. 2.4.3 USB3.1 Gen1 Interface [J5_CP]
      4. 2.4.4 USB2.0 Interface [J6_CP]
      5. 2.4.5 PCIe Card Slot [J8_CP]
      6. 2.4.6 Display Port Interfaces [J36_CP] [J37_CP]
      7. 2.4.7 MicroSD Card Cage [J49_CP]
      8. 2.4.8 Stereo Audio Interface [LINE-IN J38_CP, LINE-OUT J41B_CP, J40B_CP]
    5. 2.5 Expansion Interfaces
      1. 2.5.1 Heatsink [ACC3_SOM] with Fan Header [J15_CP]
      2. 2.5.2 CAN-FD Connectors
      3. 2.5.3 Camera Interfaces [J52_CP]
      4. 2.5.4 Automation and Control Connector [J50_CP]
      5. 2.5.5 ADC [J23_CP]
      6. 2.5.6 CSI-TX [J10_SOM]
      7. 2.5.7 Accessory Power Connector [J42_CP]
  4. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
      1. 3.4.1 Power Monitoring
      2. 3.4.2 Shared Interfaces / Signal Muxing
      3. 3.4.3 Power Delivery Network (PDN)
      4. 3.4.4 Identification EEPROM
  5. 4Revision History

3.2 Interface Mapping

The EVM Interface Mapping table is provided in Table 3-1.

Table 3-1 EVM Interface Mapping Table
Connected Peripheral Processor Resource(s) Component/Part Numbers
Memory, LPDDR4 DRAM DDR0, DDR1 Micron, MT53E2G32D4DT-046 AAT: A
Memory, OSPI MCU_OSPI0(1) Cypress, S28HS512TGABHM010
Memory, Octal NAND Winbond, W35N01JWTBAG
Memory, eMMC MMC0 Micron, MTFC16GAPALBH-AAT ES
Memory, Micro SD Socket MMC1
Memory, Board ID EEPROM WKUP_I2C0 On-Semi, CAV24C256YE-GT3
Memory, Boot EEPROM MCU_I2C0 Microchip Tech, AT24CM01
Ethernet, RGMII MCU_RGMII1 Texas Instruments, DP83867ERGZT
Memory, OSPI MCU_OSPI1 Micron, MT25QU512ABB8E12
USB 3.1 Type C + PD + CC Controller SERDES0 (TX1/RX1) Texas Instruments, TUSB321RWBR
USB 2.0 (HUB) USB0 Texas Instruments, TUSB4041IPAPR
Audio Codec McASP4 Texas Instruments, PCM3168APAP
PCIe2/Hyperlink, x4 Lane Socket (x1 Lane) SERDES0 (TX0/RX0)
UART Terminal (UART-to-USB) UART 8,5 &2 FTDI, FT4232HL
UART Terminal (UART-to-USB) WKUP_UART0 & MCU_UART0 FTDI, FT2232HL
CAN (5x) MCU_MCAN0, MCAN3 Texas Instruments, TCAN1043-Q1

MCU_MCAN1, MCAN5,

MCAN16, MCAN4

 Texas Instruments, TCAN1042HGVD
CSI CSI0, CSI1, CSI_TX QSH Connector-J52(QSH-020-01-L-D-DP-A-K)
Display Port DP0
DSI1 Texas Instruments, SN65DSI86IPAPQ1
ADC Header MCU_ADC0, MCU_ADC1
(1) MCU_OSPI0 is connected to two different flash memories, target memory selected via a mux.