SPRUJ91A april   2023  – may 2023 AM68 , AM68 , AM68A , AM68A , TDA4AL-Q1 , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VE-Q1 , TDA4VL-Q1 , TDA4VL-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Contributions to Power
  5. 2How to Use the Tool
  6. 3Use Case
    1. 3.1 Core Processor Utilization
    2. 3.2 Key IP Frequency Selection
    3. 3.3 Memory Interfaces
    4. 3.4 PHYs
    5. 3.5 High Speed Serial Interface
    6. 3.6 Environmental
    7. 3.7 LVCMOS IOs
    8. 3.8 Buttons
    9. 3.9 Starting Use Case
  7. 4Results Sheet
    1. 4.1 Thermal Power Estimate
    2. 4.2 Peak / PDN Power Estimate
  8. 5Three Specific Pre-Loaded Use Case Results
    1. 5.1 ARM Only
    2. 5.2 Superset
    3. 5.3 Valet Park
  9. 6Summary of Power for Pre-Populated Use Cases
  10. 7Revision History

5.2 Superset

A superset use case is when A72s, Pulsars, C71x and MMAs, GPU, DMPAC and VPAC are effectively maximized. In this example, the SerDes is also loaded.

In this configuration, note of the power domains are disabled.

Table 5-6 Superset Power Domain Status
Power Domain Status
PD_Pulsar_MCU ON
PD_A72_Cluster_0 ON
PD_A72_0 ON
PD_A72_1 ON
PD_C7_0 ON
PD_C7_1 ON
PD_Pulsar_0 ON
PD_Pulsar_1 ON
PD_GPUCOM ON
PD_encode ON
PD_VPAC ON
PD_DMPAC ON
The device loading is:
Table 5-7 Superset Device Configuration
Description
UC_Description
Tj 125
VDD_CORE_SRAM_Voltage 0.85
VDD_CORE_Voltage 0.8
VDD_CPU_SRAM_Voltage 0.85
VDD_CPU_Voltage 0.76
VDD_MCU_SRAM_Voltage 0.85
VDD_MCU_Voltage 0.85
Process_Corner strong
A72 CPU 80% 2000
A72 CPU 80% 2000
Pulsar Main J7AEP 71% 1000
Pulsar Main J7AEP 71% 1000
C711 512k 1.1 0% 1000
C711 512k 1.1 100% 1000
MMA2 100% 1000
Pulsar MCU J7am 50% 1000
DSS7L_eDP_DSI J7AEP 35% 0
CSI_3RX_2TX 25% 0
DPHY 1.2 RX - 4L 50% 2p5g4l
DPHY 1.2 RX - 4L 50% 2p5g4l
DPHY 1.2 TX - 4L 50% 2p5g4l
DPHY 1.2 TX - 4L 50% 2p5g4l
GPU BXS4-64-256KB DUST 80% 800
GPU BXS4-64-256KB Rascal 80% 800
GPU BXS4-64-256KB Wrap 80% 800
DMPAC J7AEP 100% 520
VPAC3 90% 720
WAVE521CL Video Codec 50% 600
CPSW2X eAVB 80% 0
Hyperlink x2 0% 0
PCIE_G3 4L J7AM 25% 0
USB3P0TCx1 J7AEP 40% 0
EMMC 4 J7AEP 0% 0
EMMC 8 J7AEP 20% 0
LPDDR4-32 EMIF J7AEP EW 35% 1067
lpddr4-32 IO 4267 39% lpddr4_4267_32
LPDDR4-32 EMIF J7AEP NS 35% 1067
lpddr4-32 IO 4267 39% lpddr4_4267_32
SerDes 10G Common 100% 2pll
SerDes 10G Lane 50% 8g
SerDes 10G Lane 50% 8g
SerDes 10G Lane 0% disable
SerDes 10G Lane 40% 5g
SDIO - 1 bit 0% off
Arasan HS400 8 bit 20% hs400
And the thermal power for the device is:
Table 5-8 Superset Thermal Power
Tj Leakage [mW] Dynamic [mW] Total [mW]
125 6340 10910 17250
115 4680 10910 15590
105 3450 10910 14360
95 2550 10910 13460
85 1880 10910 12790
40 500 10910 11410
0 170 10910 11080
-40 70 10910 10980