SPRUJ91A april   2023  – may 2023 AM68 , AM68 , AM68A , AM68A , TDA4AL-Q1 , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VE-Q1 , TDA4VL-Q1 , TDA4VL-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Contributions to Power
  5. 2How to Use the Tool
  6. 3Use Case
    1. 3.1 Core Processor Utilization
    2. 3.2 Key IP Frequency Selection
    3. 3.3 Memory Interfaces
    4. 3.4 PHYs
    5. 3.5 High Speed Serial Interface
    6. 3.6 Environmental
    7. 3.7 LVCMOS IOs
    8. 3.8 Buttons
    9. 3.9 Starting Use Case
  7. 4Results Sheet
    1. 4.1 Thermal Power Estimate
    2. 4.2 Peak / PDN Power Estimate
  8. 5Three Specific Pre-Loaded Use Case Results
    1. 5.1 ARM Only
    2. 5.2 Superset
    3. 5.3 Valet Park
  9. 6Summary of Power for Pre-Populated Use Cases
  10. 7Revision History

3.5 High Speed Serial Interface

There is one high speed serializing / deserializing (SerDes) interface on this device. The SerDes has 4 lanes for which the mode, utilization and IP is selected.

Note: The loading for the core portion of the IP is determined based upon the selected IP. The user defines what IP is driving the various lanes of the SerDes.

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