SPRUJ91A april   2023  – may 2023 AM68 , AM68 , AM68A , AM68A , TDA4AL-Q1 , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VE-Q1 , TDA4VL-Q1 , TDA4VL-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Contributions to Power
  5. 2How to Use the Tool
  6. 3Use Case
    1. 3.1 Core Processor Utilization
    2. 3.2 Key IP Frequency Selection
    3. 3.3 Memory Interfaces
    4. 3.4 PHYs
    5. 3.5 High Speed Serial Interface
    6. 3.6 Environmental
    7. 3.7 LVCMOS IOs
    8. 3.8 Buttons
    9. 3.9 Starting Use Case
  7. 4Results Sheet
    1. 4.1 Thermal Power Estimate
    2. 4.2 Peak / PDN Power Estimate
  8. 5Three Specific Pre-Loaded Use Case Results
    1. 5.1 ARM Only
    2. 5.2 Superset
    3. 5.3 Valet Park
  9. 6Summary of Power for Pre-Populated Use Cases
  10. 7Revision History

4.1 Thermal Power Estimate

  • The primary output of the estimation is shown in cells A7 to D17; this table gives the total power of the device at various temperatures.
  • Since the leakage power is exponential, the leakage component can be computed at any temperature. The cells in F8:F20 allow this computation; the leakage power is:
    Equation 2. P L K G = 10 m T j + b
  • Cells A1 to B6 contain reference information about the tool and the use case.
  • The power can be broken down by rail. Those results are provided in cell A21 to E91.
  • Cells H3 to J86 provide information (utilization and frequencies) on the use case estimated.
  • Cells H18 to I30 show how the device's power domains have been configured.
    • When possible, the tool powers OFF the power domain. If the user wants to keep the domain ON, load IP utilization within the domain at 0.1%.
    • Configure the software to match the expectations defined in the power estimate.
  • Cells H8 to I16 show a breakdown of power by block. This table shows that significant power is present in the back-plane of the device.
Note: Voltage Domains, Power Domains, and Local Power Sleep Controllers – In the Environmental section of the Use Case tab, the user selects the voltage for configurable voltage domains. Within a voltage domain (e.g. VDD_CPU_AVS), some circuitry is placed within a power domain (e.g. C7x_0 and MMA are within PD_C7_0); the power domain can break the connection to the voltage domain if-and-only-if all of the IP within the power domain is unused. Circuitry within an off power domain, do not contribute power – leakage or dynamic – to the power budget. Within the power domain, IP is controlled by a local power sleep controller (LPSC) which controls the clock and reset to the IP. IP which is not clocked does not contribute dynamic power to the overall device power, but contributes leakage power unless the IP resides in an unpowered power domain.

Note that a voltage domain typically has some IP that is within a power domain and other IP that is not within a power domain.