SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Only channel 0 can be enabled in peripheral mode.
Figure 12-40 shows an example of four peripherals wired on a single controller device.
Channel 0 in peripheral mode has the following resources:
The MCSPI_TXi and MCSPI_RXi registers are not used. Reading from or writing to a channel register other than channel 0 has no effect.
The SPICLK frequency of a transfer is controlled by the external MCSPI controller connected to the MCSPI peripheral device. The MCSPI_CH0CONF[5-2] CLKD bit field is not used in peripheral mode.
The configuration of the channel can be loaded in the MCSPI_CH0CONF only when the channel is disabled.