SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The EPWMx (where x = 0 to number of instances) module is hereinafter referred to as EPWM module.
This section describes the EPWM external connections (environment).
Figure 12-268 shows the EPWM I/O interface signals.
Table 12-229 describes the EPWM I/O signals.
Module Pin | Device Level Signal | I/O(1) | Description | Module Pin Reset Value(2) |
---|---|---|---|---|
EPWMi(3) | ||||
EPWMi(3)A | EHRPWMi(3)_A | O | EPWMi(3) output A | 0x0 |
EPWMi(3)B | EHRPWMi(3)_B | O | EPWMi(3) output B | 0x0 |
EPWMi(3)SYNCI(4) | EHRPWMi(3)_SYNCI | I | EPWMi(3) Sync input | HiZ |
EPWMi(3)SYNCO(4) | EHRPWMi(3)_SYNCO | O | EPWMi(3) Sync output | 0x0 |
EPWMi(3)_TRIP_TZ[0](4) | EHRPWM_TZn_INi(3) | I | EPWMi(3) TripZone input | HiZ |
EPWM Start of Conversion | ||||
PWM_SOCA | EHRPWM_SOCA | O | EPWM start of conversion output A | HiZ |
PWM_SOCB | EHRPWM_SOCB | O | EPWM start of conversion output B | HiZ |
For more information about device level signals (pull-up/down resistors, buffer type, multiplexing and others), see tables Pin Attributes and Pin Multiplexing in the device-specific Datasheet.