SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
---|---|---|---|---|---|---|---|
DSS_DSI0 | PSC0 | PD_DSS | LPSC_MAIN_DSS_DSI0 | 93 | OFF | YES | LPSC_MAIN_DPHY_TX0 |
Module Instance | Source | Description |
---|---|---|
DSS_DSI0 | PSC0 | DSS_DSI0 reset |
Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
---|---|---|---|---|---|
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | GICSS0_spi_IN_118 | GICSS0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | R5FSS0_CORE0_intr_IN_218 | R5FSS0_CORE0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | WKUP_R5FSS0_CORE0_intr_IN_218 | WKUP_R5FSS0_CORE0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_218 | MCU_R5FSS0_CORE0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | C7X256V0_CLEC_gic_spi_IN_118 | C7X256V0_CLEC | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_func_intr_0 | C7X256V1_CLEC_gic_spi_IN_118 | C7X256V1_CLEC | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_safety_error_fatal_intr_0 | ESM0_esm_lvl_event_IN_178 | ESM0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_dsi_0_safety_error_nonfatal_intr_0 | ESM0_esm_lvl_event_IN_179 | ESM0 | DSS_DSI0 interrupt request | level |
DSS_DSI0 | DSS_DSI0_ecc_intr_uncorr_level_sys_0 | ESM0_esm_lvl_event_IN_142 | ESM0 | DSS_DSI0 interrupt request | level |
Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
---|---|---|---|---|
DSS_DSI0 | DPHY_0_RX_ESC_CLK | MAIN_SYSCLK0/4 | ||
HFOSC0_CLKOUT_SERDES | DPHY0_CLKSEL[0:0] | |||
MAIN_PLL0_HSDIV9_CLKOUT | DPHY0_CLKSEL[0:0] | |||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MCU_DFT_SCAN_CLK | ||||
MCU_DFT_SCAN_CLK | ||||
MCU_DFT_SCAN_CLK | ||||
MAIN_TAP_BS_JTAG__CLK | ||||
DPHY_0_TX_ESC_CLK | MAIN_PLL1_HSDIV6_CLKOUT/6 | |||
DPI_0_CLK | MAIN_PBIST_CLK | |||
MAIN_PLL18_HSDIV0_CLKOUT | DSS1_DISPC0_CLKSEL[0:0] | |||
DSS1_DISPC0_CLKSEL[16:16] | ||||
MAIN_PLL17_HSDIV0_CLKOUT | DSS1_DISPC0_CLKSEL[0:0] | |||
DSS1_DISPC0_CLKSEL[16:16] | ||||
VOUT_EXTPCLKIN | DSS1_DISPC0_CLKSEL[0:0] | |||
MAIN_PLL18_HSDIV0_CLKOUT | DSS1_DISPC0_CLKSEL[1:1] | |||
DSS1_DISPC0_CLKSEL[18:18] | ||||
MAIN_PLL17_HSDIV0_CLKOUT | DSS1_DISPC0_CLKSEL[1:1] | |||
DSS1_DISPC0_CLKSEL[18:18] | ||||
VOUT_EXTPCLKIN | DSS1_DISPC0_CLKSEL[1:1] | |||
MAIN_PLL1_HSDIV4_CLKOUT | ||||
PLL_CTRL_CLK | MAIN_SYSCLK0 | |||
PPI_0_TXBYTECLKHS_CL_CLK | MAIN_SYSCLK0/4 | |||
HFOSC0_CLKOUT_SERDES | DPHY0_CLKSEL[0:0] | |||
MAIN_PLL0_HSDIV9_CLKOUT | DPHY0_CLKSEL[0:0] | |||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MAIN_PLL1_HSDIV6_CLKOUT/6 | ||||
MCU_DFT_SCAN_CLK | ||||
MCU_DFT_SCAN_CLK | ||||
MCU_DFT_SCAN_CLK | ||||
MAIN_TAP_BS_JTAG__CLK | ||||
SYS_CLK | MAIN_SYSCLK0/2 |