SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The Vision Pre-processing Accelerator (VPAC) subsystem is a set of common vision primitive functions, performing pixel data processing tasks, such as: color processing and enhancement, noise filtering, wide dynamic range (WDR) processing, lens distortion correction, pixel remap for de-warping, on-the-fly scale generation, on-the-fly pyramid generation. The VPAC offloads these common tasks from the main SoC processors (ARM, DSP, etc.), so these CPUs can be utilized for differentiated high-lelvel algorithms. The VPAC is designed to support multiple cameras by working in time-multiplexing mode. The VPAC also includes an imaging pipe, which can be integrated on-the-fly with external camera sensor, as well as does memory-to-memory (M2M) processing on pixel data.
The VPAC subsystem provides 4 processing blocks: Vision Imaging Sub-System (VISS), Lens Distortion Correction (LDC), Multi-Scalar (MSC) and Noise Filter (NF), along with Hardware Thread Scheduler (HTS), Load Store Engin (LSE), and 512 KB of internal L2 memory
Figure 12-202 provides an overview of the VPAC subsystem.