Fine-grained task switching, workload balancing and power management
Advanced DMA driven operation for minimum host CPU interaction
256KB System Level Cache (SLC)
Specialized Texture Cache Unit (TCU)
Compressed Texture Decoding
Lossless data compression (PVRGC) - The PowerVR's geometry compression, which is
performed in the Geometry Processing phase of the 3D graphics workload.
Dedicated RISC-V processor for firmware execution
Separate power island for the firmware processor for low latency power domain
transitions
On-Chip Performance, Power and Statistics Registers.
Resolution Support
Frame buffer max size = 8K × 8K
Texture max size = 8K × 8K
Anti-aliasing
Maximum 4× multisampling
Performance
Floating Point Operations (F32) - 64 operations per clock
Floating Point Operations (F16) - 128 operations per clock
Texture performance - 4 texels per clock (@32 BPP)
Pixel performance - 4 pixel(s) per clock (@32 BPP)