SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Figure 7-27 captures the channel integration between LSE and rest of VISS submodules. Though digram shows three input channels between LSE to RFE, 3 channels data is transferred using single VBUSP interface.
LSE supports YUV422 interleaving only on 8-bit data.
The LSE configuration for VISS can be read in VISS_LSE_STATUS_PARAM register fields.
For more information on LSE module operation, see Chapter Load and Store Engine (LSE).