SPRUJD8 June   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 Specification
  8. 2Hardware
    1. 2.1 Key Features and Interfaces
    2. 2.2 Power On/Off Procedure
    3. 2.3 Power Input
      1. 2.3.1 Power Supply
      2. 2.3.2 Power Control
      3. 2.3.3 Power Budget Considerations
    4. 2.4 User Inputs and Settings
      1. 2.4.1 Boot Configuration Settings
      2. 2.4.2 Board Configuration Settings
      3. 2.4.3 Reset Pushbuttons
      4. 2.4.4 User Pushbuttons
    5. 2.5 Standard Interfaces
      1. 2.5.1 Audio Input and Output
      2. 2.5.2 Display Port Interfaces
      3. 2.5.3 Gigabit Ethernet
      4. 2.5.4 JTAG/Emulation Interface
      5. 2.5.5 MicroSD Card Cage
      6. 2.5.6 PCIe Card Slot
      7. 2.5.7 UARTs for Terminal/Logging
      8. 2.5.8 USB Interface
    6. 2.6 Expansion Interfaces
      1. 2.6.1 Accessory Power Connector
      2. 2.6.2 Analog-to-Digital Conversion
      3. 2.6.3 Camera Interface
      4. 2.6.4 CAN-Bus Interface
      5. 2.6.5 Fan Header
      6. 2.6.6 LIN-Bus Interface
      7. 2.6.7 Test and Automation Control Interface
    7. 2.7 Circuit Details
      1. 2.7.1 Interface Mapping
      2. 2.7.2 Shared Interfaces / Signal Muxing
      3. 2.7.3 I2C Address Mapping
      4. 2.7.4 GPIO Mapping
      5. 2.7.5 Power Monitoring
      6. 2.7.6 Power Delivery Network (PDN)
      7. 2.7.7 Identification EEPROM
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Compliance Information
    1. 4.1 EMC, EMI, and ESD Compliance
    2. 4.2 Reach Compliance
    3. 4.3 Thermal Compliance
  11. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks

2.6.2 Analog-to-Digital Conversion

The EVM supports a interface for connecting external peripherals with ADC inputs. A 20-pin, dual row, 2.54mm pitch pin header [J27] supports eight input channels to ADC0, two channels to ADC1, and trigger, and ADC reference signals.

Table 2-11 Analog-to-Digital Expansion Pin Definition [J27]
Pin # Pin Name Description Processor Resource for [J57] / [J55] Dir
1 GND Ground
2 ADC0_AIN3 ADC Instance 0, Channel 3 Input
3 ADC0_AIN7 ADC Instance 0, Channel 7 Input
4 ADC0_AIN0 ADC Instance 0, Channel 0 Input
5 ADC0_AIN1 ADC Instance 0, Channel 1 Input
6 ADC0_AIN6 ADC Instance 0, Channel 6 Input
7 GND Ground
8 GND Ground
9 ADC0_AIN4 ADC Instance 0, Channel 4 Input
10 ADC0_REFP ADC Reference Voltage, Positive Input
11 ADC0_AIN2 ADC Instance 0, Channel 2 Input
12 ADC0_REFN ADC Reference Voltage, Negative Input
13 GND Ground
14 GND Ground
15 ADC0_AIN5 ADC Instance 0, Channel 5 Input
16 ADC_TRIGGER Conversion Trigger, configurable to ADC Instance 0 or 1

Input
17 ADC1_AIN0 ADC Instance 1, Channel 0 Input
18 ADC1_AIN1 ADC Instance 1, Channel 1 Input
19 GND Ground
20 GND Ground