SPRUJD8 June   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 Specification
  8. 2Hardware
    1. 2.1 Key Features and Interfaces
    2. 2.2 Power On/Off Procedure
    3. 2.3 Power Input
      1. 2.3.1 Power Supply
      2. 2.3.2 Power Control
      3. 2.3.3 Power Budget Considerations
    4. 2.4 User Inputs and Settings
      1. 2.4.1 Boot Configuration Settings
      2. 2.4.2 Board Configuration Settings
      3. 2.4.3 Reset Pushbuttons
      4. 2.4.4 User Pushbuttons
    5. 2.5 Standard Interfaces
      1. 2.5.1 Audio Input and Output
      2. 2.5.2 Display Port Interfaces
      3. 2.5.3 Gigabit Ethernet
      4. 2.5.4 JTAG/Emulation Interface
      5. 2.5.5 MicroSD Card Cage
      6. 2.5.6 PCIe Card Slot
      7. 2.5.7 UARTs for Terminal/Logging
      8. 2.5.8 USB Interface
    6. 2.6 Expansion Interfaces
      1. 2.6.1 Accessory Power Connector
      2. 2.6.2 Analog-to-Digital Conversion
      3. 2.6.3 Camera Interface
      4. 2.6.4 CAN-Bus Interface
      5. 2.6.5 Fan Header
      6. 2.6.6 LIN-Bus Interface
      7. 2.6.7 Test and Automation Control Interface
    7. 2.7 Circuit Details
      1. 2.7.1 Interface Mapping
      2. 2.7.2 Shared Interfaces / Signal Muxing
      3. 2.7.3 I2C Address Mapping
      4. 2.7.4 GPIO Mapping
      5. 2.7.5 Power Monitoring
      6. 2.7.6 Power Delivery Network (PDN)
      7. 2.7.7 Identification EEPROM
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Compliance Information
    1. 4.1 EMC, EMI, and ESD Compliance
    2. 4.2 Reach Compliance
    3. 4.3 Thermal Compliance
  11. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks

2.7.1 Interface Mapping

The EVM interface mapping tables is provided in Table 3-18.

Table 2-18 Interface Mapping
Connected Peripheral Processor Resources Component/Part Numbers
Memory, LPDDR4 DRAM DDR0, DDR1 (2x) Micron, MT53E2G32D4DE-046 AUT:C
Memory, xSPI NOR Flash MCU_OSPI0 Cypress, S28HS512TGABHM010
Memory, Octal NAND MCU_OSPI0 Winbond, W35N01JWTBAG
Memory, Quad SPI NOR Flash MCU_OSPI1 Micron, MT25QU512ABB8E12-0SIT
Memory, eMMC MMC0 Micron, MTFC16GAPALBH-AAT ES
Memory, microSD Card MMC1
EEPROM, Board Identification WKUP_I2C0 On-Semi, CAT24C256WI-GT3
EEPROM, Boot MCU_I2C0 Microchip Tech, AT24CM01
Memory, UFS 2L Gear3 UFS0 Toshiba, THGAF8G8T23BAIL
Wired Ethernet MCU_RGMII1, RGMII1 (2x) Texas Instruments, DP83867ERGZT
USB Type C + CC Controller USB0 + SERDES0 (L2, L3) Texas Instruments, TUSB321RWBR
USB Type A (2x) USB0 Texas Instruments, TUSB4041IPAP
Audio Codec McASP0 Texas Instruments, PCM3168APAP
PCIe 4L Card Slot PCIe1 / SERDES0 (L0, L1)
PCIe 4L Card Slot PCIe0, SERDES1
Quad USART Terminal UART 8,5,2 & 3 FTDI, FT4232HL
Dual USART Terminal WKUP_UART0, MCU_UART0 FTDI, FT2232HL
CAN (6x) MCU_MCAN0, MCU_MCAN1, MCAN4, MCAN5, MCAN16 Texas Instruments, TCAN1042HGVD
MCAN3 Texas Instruments, TCAN1043-Q1
LIN (2x) UART6, UART9 Texas Instruments, TLIN1022DMTTQ1
CSI RX Interface CSI0, CSI1, CSI2 QSH Connector-J57(QSH-020-01-L-D-DP-A-K)
Display Port DP0
DSI0 Texas Instruments, SN65DSI86IPAPQ1
ADC Header MCU_ADC0
Note: MCU_OSPI1 is connected to two different flash memories, targeted memory selected via a mux.