SPRUJD8 June   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 Specification
  8. 2Hardware
    1. 2.1 Key Features and Interfaces
    2. 2.2 Power On/Off Procedure
    3. 2.3 Power Input
      1. 2.3.1 Power Supply
      2. 2.3.2 Power Control
      3. 2.3.3 Power Budget Considerations
    4. 2.4 User Inputs and Settings
      1. 2.4.1 Boot Configuration Settings
      2. 2.4.2 Board Configuration Settings
      3. 2.4.3 Reset Pushbuttons
      4. 2.4.4 User Pushbuttons
    5. 2.5 Standard Interfaces
      1. 2.5.1 Audio Input and Output
      2. 2.5.2 Display Port Interfaces
      3. 2.5.3 Gigabit Ethernet
      4. 2.5.4 JTAG/Emulation Interface
      5. 2.5.5 MicroSD Card Cage
      6. 2.5.6 PCIe Card Slot
      7. 2.5.7 UARTs for Terminal/Logging
      8. 2.5.8 USB Interface
    6. 2.6 Expansion Interfaces
      1. 2.6.1 Accessory Power Connector
      2. 2.6.2 Analog-to-Digital Conversion
      3. 2.6.3 Camera Interface
      4. 2.6.4 CAN-Bus Interface
      5. 2.6.5 Fan Header
      6. 2.6.6 LIN-Bus Interface
      7. 2.6.7 Test and Automation Control Interface
    7. 2.7 Circuit Details
      1. 2.7.1 Interface Mapping
      2. 2.7.2 Shared Interfaces / Signal Muxing
      3. 2.7.3 I2C Address Mapping
      4. 2.7.4 GPIO Mapping
      5. 2.7.5 Power Monitoring
      6. 2.7.6 Power Delivery Network (PDN)
      7. 2.7.7 Identification EEPROM
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Compliance Information
    1. 4.1 EMC, EMI, and ESD Compliance
    2. 4.2 Reach Compliance
    3. 4.3 Thermal Compliance
  11. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
    2. 5.2 Trademarks

2.4.1 Boot Configuration Settings

The boot mode for the EVM is defined by two banks of dip switches [SW7, SW11]. These switch settings are mapped directly to the BOOTMODE pins of the processor. See the technical reference manual (TRM) of the processor for a complete definition of all supported boot modes.

Note: An OFF setting provides a logic low level ('0') and an ON setting provides a logic high level ('1'). The Test Automation Interfaces provides capability to over-ride these switch settings, but that advanced feature not discussed in this manual.

As shown in the diagram, the BOOTMODE order is reversed from the Dip Switch assignment. For example, MCU_BOOTMODE [2:0] selects the PLL configuration. The EVM uses a 19.2Mhz clock source, thus MCU_BOOTMODE [2:0] must be set to '000'. The EVM assigns MCU_BOOTMODE [1:0] to '00'. Dip switch SW7[1] maps to MCU_BOOTMODE [2] and must be set to OFF or ‘0’.

J742S2XH01EVM Dip Switch [SW7, SW11] Mapping to Boot Mode Figure 2-3 Dip Switch [SW7, SW11] Mapping to Boot Mode

The default setting of the EVM is configured for Micro SD card boot. The boot settings are:

SW7[1:8] = 0000 0000, SW11[1:8] = 1000 0010

Another common boot configuration is No-Boot. This is used when downloading code using an emulator/XDS110. That boot settings is:

SW7[1:8] = 0111 000, SW11[1:8] = 1000 1000

Other boot modes such as eMMC, Serial Flash, USB, Ethernet, and UART are supported. Please refer to processor's TRM for specific settings and complete list of supported modes.